SAM4SD32-SAM4S-EK2-IMT-Docs/html/instance__pioa_8h_source.html

/*

 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>

 */


#ifndef _SAM4S_PIOA_INSTANCE_

#define _SAM4S_PIOA_INSTANCE_


/* ========== Register definition for PIOA peripheral ========== */

#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

  #define REG_PIOA_PER                      (0x400E0E00U)

  #define REG_PIOA_PDR                      (0x400E0E04U)

  #define REG_PIOA_PSR                      (0x400E0E08U)

  #define REG_PIOA_OER                      (0x400E0E10U)

  #define REG_PIOA_ODR                      (0x400E0E14U)

  #define REG_PIOA_OSR                      (0x400E0E18U)

  #define REG_PIOA_IFER                     (0x400E0E20U)

  #define REG_PIOA_IFDR                     (0x400E0E24U)

  #define REG_PIOA_IFSR                     (0x400E0E28U)

  #define REG_PIOA_SODR                     (0x400E0E30U)

  #define REG_PIOA_CODR                     (0x400E0E34U)

  #define REG_PIOA_ODSR                     (0x400E0E38U)

  #define REG_PIOA_PDSR                     (0x400E0E3CU)

  #define REG_PIOA_IER                      (0x400E0E40U)

  #define REG_PIOA_IDR                      (0x400E0E44U)

  #define REG_PIOA_IMR                      (0x400E0E48U)

  #define REG_PIOA_ISR                      (0x400E0E4CU)

  #define REG_PIOA_MDER                     (0x400E0E50U)

  #define REG_PIOA_MDDR                     (0x400E0E54U)

  #define REG_PIOA_MDSR                     (0x400E0E58U)

  #define REG_PIOA_PUDR                     (0x400E0E60U)

  #define REG_PIOA_PUER                     (0x400E0E64U)

  #define REG_PIOA_PUSR                     (0x400E0E68U)

  #define REG_PIOA_ABCDSR                   (0x400E0E70U)

  #define REG_PIOA_IFSCDR                   (0x400E0E80U)

  #define REG_PIOA_IFSCER                   (0x400E0E84U)

  #define REG_PIOA_IFSCSR                   (0x400E0E88U)

  #define REG_PIOA_SCDR                     (0x400E0E8CU)

  #define REG_PIOA_PPDDR                    (0x400E0E90U)

  #define REG_PIOA_PPDER                    (0x400E0E94U)

  #define REG_PIOA_PPDSR                    (0x400E0E98U)

  #define REG_PIOA_OWER                     (0x400E0EA0U)

  #define REG_PIOA_OWDR                     (0x400E0EA4U)

  #define REG_PIOA_OWSR                     (0x400E0EA8U)

  #define REG_PIOA_AIMER                    (0x400E0EB0U)

  #define REG_PIOA_AIMDR                    (0x400E0EB4U)

  #define REG_PIOA_AIMMR                    (0x400E0EB8U)

  #define REG_PIOA_ESR                      (0x400E0EC0U)

  #define REG_PIOA_LSR                      (0x400E0EC4U)

  #define REG_PIOA_ELSR                     (0x400E0EC8U)

  #define REG_PIOA_FELLSR                   (0x400E0ED0U)

  #define REG_PIOA_REHLSR                   (0x400E0ED4U)

  #define REG_PIOA_FRLHSR                   (0x400E0ED8U)

  #define REG_PIOA_LOCKSR                   (0x400E0EE0U)

  #define REG_PIOA_WPMR                     (0x400E0EE4U)

  #define REG_PIOA_WPSR                     (0x400E0EE8U)

  #define REG_PIOA_SCHMITT                  (0x400E0F00U)

  #define REG_PIOA_PCMR                     (0x400E0F50U)

  #define REG_PIOA_PCIER                    (0x400E0F54U)

  #define REG_PIOA_PCIDR                    (0x400E0F58U)

  #define REG_PIOA_PCIMR                    (0x400E0F5CU)

  #define REG_PIOA_PCISR                    (0x400E0F60U)

  #define REG_PIOA_PCRHR                    (0x400E0F64U)

  #define REG_PIOA_RPR                      (0x400E0F68U)

  #define REG_PIOA_RCR                      (0x400E0F6CU)

  #define REG_PIOA_RNPR                     (0x400E0F78U)

  #define REG_PIOA_RNCR                     (0x400E0F7CU)

  #define REG_PIOA_PTCR                     (0x400E0F88U)

  #define REG_PIOA_PTSR                     (0x400E0F8CU)

#else

  #define REG_PIOA_PER     (*(__O  uint32_t*)0x400E0E00U)

  #define REG_PIOA_PDR     (*(__O  uint32_t*)0x400E0E04U)

  #define REG_PIOA_PSR     (*(__I  uint32_t*)0x400E0E08U)

  #define REG_PIOA_OER     (*(__O  uint32_t*)0x400E0E10U)

  #define REG_PIOA_ODR     (*(__O  uint32_t*)0x400E0E14U)

  #define REG_PIOA_OSR     (*(__I  uint32_t*)0x400E0E18U)

  #define REG_PIOA_IFER    (*(__O  uint32_t*)0x400E0E20U)

  #define REG_PIOA_IFDR    (*(__O  uint32_t*)0x400E0E24U)

  #define REG_PIOA_IFSR    (*(__I  uint32_t*)0x400E0E28U)

  #define REG_PIOA_SODR    (*(__O  uint32_t*)0x400E0E30U)

  #define REG_PIOA_CODR    (*(__O  uint32_t*)0x400E0E34U)

  #define REG_PIOA_ODSR    (*(__IO uint32_t*)0x400E0E38U)

  #define REG_PIOA_PDSR    (*(__I  uint32_t*)0x400E0E3CU)

  #define REG_PIOA_IER     (*(__O  uint32_t*)0x400E0E40U)

  #define REG_PIOA_IDR     (*(__O  uint32_t*)0x400E0E44U)

  #define REG_PIOA_IMR     (*(__I  uint32_t*)0x400E0E48U)

  #define REG_PIOA_ISR     (*(__I  uint32_t*)0x400E0E4CU)

  #define REG_PIOA_MDER    (*(__O  uint32_t*)0x400E0E50U)

  #define REG_PIOA_MDDR    (*(__O  uint32_t*)0x400E0E54U)

  #define REG_PIOA_MDSR    (*(__I  uint32_t*)0x400E0E58U)

  #define REG_PIOA_PUDR    (*(__O  uint32_t*)0x400E0E60U)

  #define REG_PIOA_PUER    (*(__O  uint32_t*)0x400E0E64U)

  #define REG_PIOA_PUSR    (*(__I  uint32_t*)0x400E0E68U)

  #define REG_PIOA_ABCDSR  (*(__IO uint32_t*)0x400E0E70U)

  #define REG_PIOA_IFSCDR  (*(__O  uint32_t*)0x400E0E80U)

  #define REG_PIOA_IFSCER  (*(__O  uint32_t*)0x400E0E84U)

  #define REG_PIOA_IFSCSR  (*(__I  uint32_t*)0x400E0E88U)

  #define REG_PIOA_SCDR    (*(__IO uint32_t*)0x400E0E8CU)

  #define REG_PIOA_PPDDR   (*(__O  uint32_t*)0x400E0E90U)

  #define REG_PIOA_PPDER   (*(__O  uint32_t*)0x400E0E94U)

  #define REG_PIOA_PPDSR   (*(__I  uint32_t*)0x400E0E98U)

  #define REG_PIOA_OWER    (*(__O  uint32_t*)0x400E0EA0U)

  #define REG_PIOA_OWDR    (*(__O  uint32_t*)0x400E0EA4U)

  #define REG_PIOA_OWSR    (*(__I  uint32_t*)0x400E0EA8U)

  #define REG_PIOA_AIMER   (*(__O  uint32_t*)0x400E0EB0U)

  #define REG_PIOA_AIMDR   (*(__O  uint32_t*)0x400E0EB4U)

  #define REG_PIOA_AIMMR   (*(__I  uint32_t*)0x400E0EB8U)

  #define REG_PIOA_ESR     (*(__O  uint32_t*)0x400E0EC0U)

  #define REG_PIOA_LSR     (*(__O  uint32_t*)0x400E0EC4U)

  #define REG_PIOA_ELSR    (*(__I  uint32_t*)0x400E0EC8U)

  #define REG_PIOA_FELLSR  (*(__O  uint32_t*)0x400E0ED0U)

  #define REG_PIOA_REHLSR  (*(__O  uint32_t*)0x400E0ED4U)

  #define REG_PIOA_FRLHSR  (*(__I  uint32_t*)0x400E0ED8U)

  #define REG_PIOA_LOCKSR  (*(__I  uint32_t*)0x400E0EE0U)

  #define REG_PIOA_WPMR    (*(__IO uint32_t*)0x400E0EE4U)

  #define REG_PIOA_WPSR    (*(__I  uint32_t*)0x400E0EE8U)

  #define REG_PIOA_SCHMITT (*(__IO uint32_t*)0x400E0F00U)

  #define REG_PIOA_PCMR    (*(__IO uint32_t*)0x400E0F50U)

  #define REG_PIOA_PCIER   (*(__O  uint32_t*)0x400E0F54U)

  #define REG_PIOA_PCIDR   (*(__O  uint32_t*)0x400E0F58U)

  #define REG_PIOA_PCIMR   (*(__I  uint32_t*)0x400E0F5CU)

  #define REG_PIOA_PCISR   (*(__I  uint32_t*)0x400E0F60U)

  #define REG_PIOA_PCRHR   (*(__I  uint32_t*)0x400E0F64U)

  #define REG_PIOA_RPR     (*(__IO uint32_t*)0x400E0F68U)

  #define REG_PIOA_RCR     (*(__IO uint32_t*)0x400E0F6CU)

  #define REG_PIOA_RNPR    (*(__IO uint32_t*)0x400E0F78U)

  #define REG_PIOA_RNCR    (*(__IO uint32_t*)0x400E0F7CU)

  #define REG_PIOA_PTCR    (*(__O  uint32_t*)0x400E0F88U)

  #define REG_PIOA_PTSR    (*(__I  uint32_t*)0x400E0F8CU)

#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#endif /* _SAM4S_PIOA_INSTANCE_ */