Macros
#define	REG_PIOA_ABCDSR ((__IO uint32_t)0x400E0E70U)
	(PIOA) Peripheral Select Register
#define	REG_PIOA_AIMDR ((__O uint32_t)0x400E0EB4U)
	(PIOA) Additional Interrupt Modes Disables Register
#define	REG_PIOA_AIMER ((__O uint32_t)0x400E0EB0U)
	(PIOA) Additional Interrupt Modes Enable Register
#define	REG_PIOA_AIMMR ((__I uint32_t)0x400E0EB8U)
	(PIOA) Additional Interrupt Modes Mask Register
#define	REG_PIOA_CODR ((__O uint32_t)0x400E0E34U)
	(PIOA) Clear Output Data Register
#define	REG_PIOA_ELSR ((__I uint32_t)0x400E0EC8U)
	(PIOA) Edge/Level Status Register
#define	REG_PIOA_ESR ((__O uint32_t)0x400E0EC0U)
	(PIOA) Edge Select Register
#define	REG_PIOA_FELLSR ((__O uint32_t)0x400E0ED0U)
	(PIOA) Falling Edge/Low Level Select Register
#define	REG_PIOA_FRLHSR ((__I uint32_t)0x400E0ED8U)
	(PIOA) Fall/Rise - Low/High Status Register
#define	REG_PIOA_IDR ((__O uint32_t)0x400E0E44U)
	(PIOA) Interrupt Disable Register
#define	REG_PIOA_IER ((__O uint32_t)0x400E0E40U)
	(PIOA) Interrupt Enable Register
#define	REG_PIOA_IFDR ((__O uint32_t)0x400E0E24U)
	(PIOA) Glitch Input Filter Disable Register
#define	REG_PIOA_IFER ((__O uint32_t)0x400E0E20U)
	(PIOA) Glitch Input Filter Enable Register
#define	REG_PIOA_IFSCDR ((__O uint32_t)0x400E0E80U)
	(PIOA) Input Filter Slow Clock Disable Register
#define	REG_PIOA_IFSCER ((__O uint32_t)0x400E0E84U)
	(PIOA) Input Filter Slow Clock Enable Register
#define	REG_PIOA_IFSCSR ((__I uint32_t)0x400E0E88U)
	(PIOA) Input Filter Slow Clock Status Register
#define	REG_PIOA_IFSR ((__I uint32_t)0x400E0E28U)
	(PIOA) Glitch Input Filter Status Register
#define	REG_PIOA_IMR ((__I uint32_t)0x400E0E48U)
	(PIOA) Interrupt Mask Register
#define	REG_PIOA_ISR ((__I uint32_t)0x400E0E4CU)
	(PIOA) Interrupt Status Register
#define	REG_PIOA_LOCKSR ((__I uint32_t)0x400E0EE0U)
	(PIOA) Lock Status
#define	REG_PIOA_LSR ((__O uint32_t)0x400E0EC4U)
	(PIOA) Level Select Register
#define	REG_PIOA_MDDR ((__O uint32_t)0x400E0E54U)
	(PIOA) Multi-driver Disable Register
#define	REG_PIOA_MDER ((__O uint32_t)0x400E0E50U)
	(PIOA) Multi-driver Enable Register
#define	REG_PIOA_MDSR ((__I uint32_t)0x400E0E58U)
	(PIOA) Multi-driver Status Register
#define	REG_PIOA_ODR ((__O uint32_t)0x400E0E14U)
	(PIOA) Output Disable Register
#define	REG_PIOA_ODSR ((__IO uint32_t)0x400E0E38U)
	(PIOA) Output Data Status Register
#define	REG_PIOA_OER ((__O uint32_t)0x400E0E10U)
	(PIOA) Output Enable Register
#define	REG_PIOA_OSR ((__I uint32_t)0x400E0E18U)
	(PIOA) Output Status Register
#define	REG_PIOA_OWDR ((__O uint32_t)0x400E0EA4U)
	(PIOA) Output Write Disable
#define	REG_PIOA_OWER ((__O uint32_t)0x400E0EA0U)
	(PIOA) Output Write Enable
#define	REG_PIOA_OWSR ((__I uint32_t)0x400E0EA8U)
	(PIOA) Output Write Status Register
#define	REG_PIOA_PCIDR ((__O uint32_t)0x400E0F58U)
	(PIOA) Parallel Capture Interrupt Disable Register
#define	REG_PIOA_PCIER ((__O uint32_t)0x400E0F54U)
	(PIOA) Parallel Capture Interrupt Enable Register
#define	REG_PIOA_PCIMR ((__I uint32_t)0x400E0F5CU)
	(PIOA) Parallel Capture Interrupt Mask Register
#define	REG_PIOA_PCISR ((__I uint32_t)0x400E0F60U)
	(PIOA) Parallel Capture Interrupt Status Register
#define	REG_PIOA_PCMR ((__IO uint32_t)0x400E0F50U)
	(PIOA) Parallel Capture Mode Register
#define	REG_PIOA_PCRHR ((__I uint32_t)0x400E0F64U)
	(PIOA) Parallel Capture Reception Holding Register
#define	REG_PIOA_PDR ((__O uint32_t)0x400E0E04U)
	(PIOA) PIO Disable Register
#define	REG_PIOA_PDSR ((__I uint32_t)0x400E0E3CU)
	(PIOA) Pin Data Status Register
#define	REG_PIOA_PER ((__O uint32_t)0x400E0E00U)
	(PIOA) PIO Enable Register
#define	REG_PIOA_PPDDR ((__O uint32_t)0x400E0E90U)
	(PIOA) Pad Pull-down Disable Register
#define	REG_PIOA_PPDER ((__O uint32_t)0x400E0E94U)
	(PIOA) Pad Pull-down Enable Register
#define	REG_PIOA_PPDSR ((__I uint32_t)0x400E0E98U)
	(PIOA) Pad Pull-down Status Register
#define	REG_PIOA_PSR ((__I uint32_t)0x400E0E08U)
	(PIOA) PIO Status Register
#define	REG_PIOA_PTCR ((__O uint32_t)0x400E0F88U)
	(PIOA) Transfer Control Register
#define	REG_PIOA_PTSR ((__I uint32_t)0x400E0F8CU)
	(PIOA) Transfer Status Register
#define	REG_PIOA_PUDR ((__O uint32_t)0x400E0E60U)
	(PIOA) Pull-up Disable Register
#define	REG_PIOA_PUER ((__O uint32_t)0x400E0E64U)
	(PIOA) Pull-up Enable Register
#define	REG_PIOA_PUSR ((__I uint32_t)0x400E0E68U)
	(PIOA) Pad Pull-up Status Register
#define	REG_PIOA_RCR ((__IO uint32_t)0x400E0F6CU)
	(PIOA) Receive Counter Register
#define	REG_PIOA_REHLSR ((__O uint32_t)0x400E0ED4U)
	(PIOA) Rising Edge/ High Level Select Register
#define	REG_PIOA_RNCR ((__IO uint32_t)0x400E0F7CU)
	(PIOA) Receive Next Counter Register
#define	REG_PIOA_RNPR ((__IO uint32_t)0x400E0F78U)
	(PIOA) Receive Next Pointer Register
#define	REG_PIOA_RPR ((__IO uint32_t)0x400E0F68U)
	(PIOA) Receive Pointer Register
#define	REG_PIOA_SCDR ((__IO uint32_t)0x400E0E8CU)
	(PIOA) Slow Clock Divider Debouncing Register
#define	REG_PIOA_SCHMITT ((__IO uint32_t)0x400E0F00U)
	(PIOA) Schmitt Trigger Register
#define	REG_PIOA_SODR ((__O uint32_t)0x400E0E30U)
	(PIOA) Set Output Data Register
#define	REG_PIOA_WPMR ((__IO uint32_t)0x400E0EE4U)
	(PIOA) Write Protect Mode Register
#define	REG_PIOA_WPSR ((__I uint32_t)0x400E0EE8U)
	(PIOA) Write Protect Status Register

Detailed Description

and its subsidiaries.

\cond ASF_LICENSE

Definition in file instance_pioa.h.

Macro Definition Documentation

◆ REG_PIOA_ABCDSR

#define REG_PIOA_ABCDSR (*(__IO uint32_t*)0x400E0E70U)

(PIOA) Peripheral Select Register

Definition at line 123 of file instance_pioa.h.

◆ REG_PIOA_AIMDR

#define REG_PIOA_AIMDR (*(__O uint32_t*)0x400E0EB4U)

(PIOA) Additional Interrupt Modes Disables Register

Definition at line 135 of file instance_pioa.h.

◆ REG_PIOA_AIMER

#define REG_PIOA_AIMER (*(__O uint32_t*)0x400E0EB0U)

(PIOA) Additional Interrupt Modes Enable Register

Definition at line 134 of file instance_pioa.h.

◆ REG_PIOA_AIMMR

#define REG_PIOA_AIMMR (*(__I uint32_t*)0x400E0EB8U)

(PIOA) Additional Interrupt Modes Mask Register

Definition at line 136 of file instance_pioa.h.

◆ REG_PIOA_CODR

#define REG_PIOA_CODR (*(__O uint32_t*)0x400E0E34U)

(PIOA) Clear Output Data Register

Definition at line 110 of file instance_pioa.h.

◆ REG_PIOA_ELSR

#define REG_PIOA_ELSR (*(__I uint32_t*)0x400E0EC8U)

(PIOA) Edge/Level Status Register

Definition at line 139 of file instance_pioa.h.

◆ REG_PIOA_ESR

#define REG_PIOA_ESR (*(__O uint32_t*)0x400E0EC0U)

(PIOA) Edge Select Register

Definition at line 137 of file instance_pioa.h.

◆ REG_PIOA_FELLSR

#define REG_PIOA_FELLSR (*(__O uint32_t*)0x400E0ED0U)

(PIOA) Falling Edge/Low Level Select Register

Definition at line 140 of file instance_pioa.h.

◆ REG_PIOA_FRLHSR

#define REG_PIOA_FRLHSR (*(__I uint32_t*)0x400E0ED8U)

(PIOA) Fall/Rise - Low/High Status Register

Definition at line 142 of file instance_pioa.h.

◆ REG_PIOA_IDR

#define REG_PIOA_IDR (*(__O uint32_t*)0x400E0E44U)

(PIOA) Interrupt Disable Register

Definition at line 114 of file instance_pioa.h.

◆ REG_PIOA_IER

#define REG_PIOA_IER (*(__O uint32_t*)0x400E0E40U)

(PIOA) Interrupt Enable Register

Definition at line 113 of file instance_pioa.h.

◆ REG_PIOA_IFDR

#define REG_PIOA_IFDR (*(__O uint32_t*)0x400E0E24U)

(PIOA) Glitch Input Filter Disable Register

Definition at line 107 of file instance_pioa.h.

◆ REG_PIOA_IFER

#define REG_PIOA_IFER (*(__O uint32_t*)0x400E0E20U)

(PIOA) Glitch Input Filter Enable Register

Definition at line 106 of file instance_pioa.h.

◆ REG_PIOA_IFSCDR

#define REG_PIOA_IFSCDR (*(__O uint32_t*)0x400E0E80U)

(PIOA) Input Filter Slow Clock Disable Register

Definition at line 124 of file instance_pioa.h.

◆ REG_PIOA_IFSCER

#define REG_PIOA_IFSCER (*(__O uint32_t*)0x400E0E84U)

(PIOA) Input Filter Slow Clock Enable Register

Definition at line 125 of file instance_pioa.h.

◆ REG_PIOA_IFSCSR

#define REG_PIOA_IFSCSR (*(__I uint32_t*)0x400E0E88U)

(PIOA) Input Filter Slow Clock Status Register

Definition at line 126 of file instance_pioa.h.

◆ REG_PIOA_IFSR

#define REG_PIOA_IFSR (*(__I uint32_t*)0x400E0E28U)

(PIOA) Glitch Input Filter Status Register

Definition at line 108 of file instance_pioa.h.

◆ REG_PIOA_IMR

#define REG_PIOA_IMR (*(__I uint32_t*)0x400E0E48U)

(PIOA) Interrupt Mask Register

Definition at line 115 of file instance_pioa.h.

◆ REG_PIOA_ISR

#define REG_PIOA_ISR (*(__I uint32_t*)0x400E0E4CU)

(PIOA) Interrupt Status Register

Definition at line 116 of file instance_pioa.h.

◆ REG_PIOA_LOCKSR

#define REG_PIOA_LOCKSR (*(__I uint32_t*)0x400E0EE0U)

(PIOA) Lock Status

Definition at line 143 of file instance_pioa.h.

◆ REG_PIOA_LSR

#define REG_PIOA_LSR (*(__O uint32_t*)0x400E0EC4U)

(PIOA) Level Select Register

Definition at line 138 of file instance_pioa.h.

◆ REG_PIOA_MDDR

#define REG_PIOA_MDDR (*(__O uint32_t*)0x400E0E54U)

(PIOA) Multi-driver Disable Register

Definition at line 118 of file instance_pioa.h.

◆ REG_PIOA_MDER

#define REG_PIOA_MDER (*(__O uint32_t*)0x400E0E50U)

(PIOA) Multi-driver Enable Register

Definition at line 117 of file instance_pioa.h.

◆ REG_PIOA_MDSR

#define REG_PIOA_MDSR (*(__I uint32_t*)0x400E0E58U)

(PIOA) Multi-driver Status Register

Definition at line 119 of file instance_pioa.h.

◆ REG_PIOA_ODR

#define REG_PIOA_ODR (*(__O uint32_t*)0x400E0E14U)

(PIOA) Output Disable Register

Definition at line 104 of file instance_pioa.h.

◆ REG_PIOA_ODSR

#define REG_PIOA_ODSR (*(__IO uint32_t*)0x400E0E38U)

(PIOA) Output Data Status Register

Definition at line 111 of file instance_pioa.h.

◆ REG_PIOA_OER

#define REG_PIOA_OER (*(__O uint32_t*)0x400E0E10U)

(PIOA) Output Enable Register

Definition at line 103 of file instance_pioa.h.

◆ REG_PIOA_OSR

#define REG_PIOA_OSR (*(__I uint32_t*)0x400E0E18U)

(PIOA) Output Status Register

Definition at line 105 of file instance_pioa.h.

◆ REG_PIOA_OWDR

#define REG_PIOA_OWDR (*(__O uint32_t*)0x400E0EA4U)

(PIOA) Output Write Disable

Definition at line 132 of file instance_pioa.h.

◆ REG_PIOA_OWER

#define REG_PIOA_OWER (*(__O uint32_t*)0x400E0EA0U)

(PIOA) Output Write Enable

Definition at line 131 of file instance_pioa.h.

◆ REG_PIOA_OWSR

#define REG_PIOA_OWSR (*(__I uint32_t*)0x400E0EA8U)

(PIOA) Output Write Status Register

Definition at line 133 of file instance_pioa.h.

◆ REG_PIOA_PCIDR

#define REG_PIOA_PCIDR (*(__O uint32_t*)0x400E0F58U)

(PIOA) Parallel Capture Interrupt Disable Register

Definition at line 149 of file instance_pioa.h.

◆ REG_PIOA_PCIER

#define REG_PIOA_PCIER (*(__O uint32_t*)0x400E0F54U)

(PIOA) Parallel Capture Interrupt Enable Register

Definition at line 148 of file instance_pioa.h.

◆ REG_PIOA_PCIMR

#define REG_PIOA_PCIMR (*(__I uint32_t*)0x400E0F5CU)

(PIOA) Parallel Capture Interrupt Mask Register

Definition at line 150 of file instance_pioa.h.

◆ REG_PIOA_PCISR

#define REG_PIOA_PCISR (*(__I uint32_t*)0x400E0F60U)

(PIOA) Parallel Capture Interrupt Status Register

Definition at line 151 of file instance_pioa.h.

◆ REG_PIOA_PCMR

#define REG_PIOA_PCMR (*(__IO uint32_t*)0x400E0F50U)

(PIOA) Parallel Capture Mode Register

Definition at line 147 of file instance_pioa.h.

◆ REG_PIOA_PCRHR

#define REG_PIOA_PCRHR (*(__I uint32_t*)0x400E0F64U)

(PIOA) Parallel Capture Reception Holding Register

Definition at line 152 of file instance_pioa.h.

◆ REG_PIOA_PDR

#define REG_PIOA_PDR (*(__O uint32_t*)0x400E0E04U)

(PIOA) PIO Disable Register

Definition at line 101 of file instance_pioa.h.

◆ REG_PIOA_PDSR

#define REG_PIOA_PDSR (*(__I uint32_t*)0x400E0E3CU)

(PIOA) Pin Data Status Register

Definition at line 112 of file instance_pioa.h.

◆ REG_PIOA_PER

#define REG_PIOA_PER (*(__O uint32_t*)0x400E0E00U)

(PIOA) PIO Enable Register

Definition at line 100 of file instance_pioa.h.

◆ REG_PIOA_PPDDR

#define REG_PIOA_PPDDR (*(__O uint32_t*)0x400E0E90U)

(PIOA) Pad Pull-down Disable Register

Definition at line 128 of file instance_pioa.h.

◆ REG_PIOA_PPDER

#define REG_PIOA_PPDER (*(__O uint32_t*)0x400E0E94U)

(PIOA) Pad Pull-down Enable Register

Definition at line 129 of file instance_pioa.h.

◆ REG_PIOA_PPDSR

#define REG_PIOA_PPDSR (*(__I uint32_t*)0x400E0E98U)

(PIOA) Pad Pull-down Status Register

Definition at line 130 of file instance_pioa.h.

◆ REG_PIOA_PSR

#define REG_PIOA_PSR (*(__I uint32_t*)0x400E0E08U)

(PIOA) PIO Status Register

Definition at line 102 of file instance_pioa.h.

◆ REG_PIOA_PTCR

#define REG_PIOA_PTCR (*(__O uint32_t*)0x400E0F88U)

(PIOA) Transfer Control Register

Definition at line 157 of file instance_pioa.h.

◆ REG_PIOA_PTSR

#define REG_PIOA_PTSR (*(__I uint32_t*)0x400E0F8CU)

(PIOA) Transfer Status Register

Definition at line 158 of file instance_pioa.h.

◆ REG_PIOA_PUDR

#define REG_PIOA_PUDR (*(__O uint32_t*)0x400E0E60U)

(PIOA) Pull-up Disable Register

Definition at line 120 of file instance_pioa.h.

◆ REG_PIOA_PUER

#define REG_PIOA_PUER (*(__O uint32_t*)0x400E0E64U)

(PIOA) Pull-up Enable Register

Definition at line 121 of file instance_pioa.h.

◆ REG_PIOA_PUSR

#define REG_PIOA_PUSR (*(__I uint32_t*)0x400E0E68U)

(PIOA) Pad Pull-up Status Register

Definition at line 122 of file instance_pioa.h.

◆ REG_PIOA_RCR

#define REG_PIOA_RCR (*(__IO uint32_t*)0x400E0F6CU)

(PIOA) Receive Counter Register

Definition at line 154 of file instance_pioa.h.

◆ REG_PIOA_REHLSR

#define REG_PIOA_REHLSR (*(__O uint32_t*)0x400E0ED4U)

(PIOA) Rising Edge/ High Level Select Register

Definition at line 141 of file instance_pioa.h.

◆ REG_PIOA_RNCR

#define REG_PIOA_RNCR (*(__IO uint32_t*)0x400E0F7CU)

(PIOA) Receive Next Counter Register

Definition at line 156 of file instance_pioa.h.

◆ REG_PIOA_RNPR

#define REG_PIOA_RNPR (*(__IO uint32_t*)0x400E0F78U)

(PIOA) Receive Next Pointer Register

Definition at line 155 of file instance_pioa.h.

◆ REG_PIOA_RPR

#define REG_PIOA_RPR (*(__IO uint32_t*)0x400E0F68U)

(PIOA) Receive Pointer Register

Definition at line 153 of file instance_pioa.h.

◆ REG_PIOA_SCDR

#define REG_PIOA_SCDR (*(__IO uint32_t*)0x400E0E8CU)

(PIOA) Slow Clock Divider Debouncing Register

Definition at line 127 of file instance_pioa.h.

◆ REG_PIOA_SCHMITT

#define REG_PIOA_SCHMITT (*(__IO uint32_t*)0x400E0F00U)

(PIOA) Schmitt Trigger Register

Definition at line 146 of file instance_pioa.h.

◆ REG_PIOA_SODR

#define REG_PIOA_SODR (*(__O uint32_t*)0x400E0E30U)

(PIOA) Set Output Data Register

Definition at line 109 of file instance_pioa.h.

◆ REG_PIOA_WPMR

#define REG_PIOA_WPMR (*(__IO uint32_t*)0x400E0EE4U)

(PIOA) Write Protect Mode Register

Definition at line 144 of file instance_pioa.h.

◆ REG_PIOA_WPSR

#define REG_PIOA_WPSR (*(__I uint32_t*)0x400E0EE8U)

(PIOA) Write Protect Status Register

Definition at line 145 of file instance_pioa.h.

Macros