Macros
#define	REG_PIOC_ABCDSR ((__IO uint32_t)0x400E1270U)
	(PIOC) Peripheral Select Register
#define	REG_PIOC_AIMDR ((__O uint32_t)0x400E12B4U)
	(PIOC) Additional Interrupt Modes Disables Register
#define	REG_PIOC_AIMER ((__O uint32_t)0x400E12B0U)
	(PIOC) Additional Interrupt Modes Enable Register
#define	REG_PIOC_AIMMR ((__I uint32_t)0x400E12B8U)
	(PIOC) Additional Interrupt Modes Mask Register
#define	REG_PIOC_CODR ((__O uint32_t)0x400E1234U)
	(PIOC) Clear Output Data Register
#define	REG_PIOC_ELSR ((__I uint32_t)0x400E12C8U)
	(PIOC) Edge/Level Status Register
#define	REG_PIOC_ESR ((__O uint32_t)0x400E12C0U)
	(PIOC) Edge Select Register
#define	REG_PIOC_FELLSR ((__O uint32_t)0x400E12D0U)
	(PIOC) Falling Edge/Low Level Select Register
#define	REG_PIOC_FRLHSR ((__I uint32_t)0x400E12D8U)
	(PIOC) Fall/Rise - Low/High Status Register
#define	REG_PIOC_IDR ((__O uint32_t)0x400E1244U)
	(PIOC) Interrupt Disable Register
#define	REG_PIOC_IER ((__O uint32_t)0x400E1240U)
	(PIOC) Interrupt Enable Register
#define	REG_PIOC_IFDR ((__O uint32_t)0x400E1224U)
	(PIOC) Glitch Input Filter Disable Register
#define	REG_PIOC_IFER ((__O uint32_t)0x400E1220U)
	(PIOC) Glitch Input Filter Enable Register
#define	REG_PIOC_IFSCDR ((__O uint32_t)0x400E1280U)
	(PIOC) Input Filter Slow Clock Disable Register
#define	REG_PIOC_IFSCER ((__O uint32_t)0x400E1284U)
	(PIOC) Input Filter Slow Clock Enable Register
#define	REG_PIOC_IFSCSR ((__I uint32_t)0x400E1288U)
	(PIOC) Input Filter Slow Clock Status Register
#define	REG_PIOC_IFSR ((__I uint32_t)0x400E1228U)
	(PIOC) Glitch Input Filter Status Register
#define	REG_PIOC_IMR ((__I uint32_t)0x400E1248U)
	(PIOC) Interrupt Mask Register
#define	REG_PIOC_ISR ((__I uint32_t)0x400E124CU)
	(PIOC) Interrupt Status Register
#define	REG_PIOC_LOCKSR ((__I uint32_t)0x400E12E0U)
	(PIOC) Lock Status
#define	REG_PIOC_LSR ((__O uint32_t)0x400E12C4U)
	(PIOC) Level Select Register
#define	REG_PIOC_MDDR ((__O uint32_t)0x400E1254U)
	(PIOC) Multi-driver Disable Register
#define	REG_PIOC_MDER ((__O uint32_t)0x400E1250U)
	(PIOC) Multi-driver Enable Register
#define	REG_PIOC_MDSR ((__I uint32_t)0x400E1258U)
	(PIOC) Multi-driver Status Register
#define	REG_PIOC_ODR ((__O uint32_t)0x400E1214U)
	(PIOC) Output Disable Register
#define	REG_PIOC_ODSR ((__IO uint32_t)0x400E1238U)
	(PIOC) Output Data Status Register
#define	REG_PIOC_OER ((__O uint32_t)0x400E1210U)
	(PIOC) Output Enable Register
#define	REG_PIOC_OSR ((__I uint32_t)0x400E1218U)
	(PIOC) Output Status Register
#define	REG_PIOC_OWDR ((__O uint32_t)0x400E12A4U)
	(PIOC) Output Write Disable
#define	REG_PIOC_OWER ((__O uint32_t)0x400E12A0U)
	(PIOC) Output Write Enable
#define	REG_PIOC_OWSR ((__I uint32_t)0x400E12A8U)
	(PIOC) Output Write Status Register
#define	REG_PIOC_PCIDR ((__O uint32_t)0x400E1358U)
	(PIOC) Parallel Capture Interrupt Disable Register
#define	REG_PIOC_PCIER ((__O uint32_t)0x400E1354U)
	(PIOC) Parallel Capture Interrupt Enable Register
#define	REG_PIOC_PCIMR ((__I uint32_t)0x400E135CU)
	(PIOC) Parallel Capture Interrupt Mask Register
#define	REG_PIOC_PCISR ((__I uint32_t)0x400E1360U)
	(PIOC) Parallel Capture Interrupt Status Register
#define	REG_PIOC_PCMR ((__IO uint32_t)0x400E1350U)
	(PIOC) Parallel Capture Mode Register
#define	REG_PIOC_PCRHR ((__I uint32_t)0x400E1364U)
	(PIOC) Parallel Capture Reception Holding Register
#define	REG_PIOC_PDR ((__O uint32_t)0x400E1204U)
	(PIOC) PIO Disable Register
#define	REG_PIOC_PDSR ((__I uint32_t)0x400E123CU)
	(PIOC) Pin Data Status Register
#define	REG_PIOC_PER ((__O uint32_t)0x400E1200U)
	(PIOC) PIO Enable Register
#define	REG_PIOC_PPDDR ((__O uint32_t)0x400E1290U)
	(PIOC) Pad Pull-down Disable Register
#define	REG_PIOC_PPDER ((__O uint32_t)0x400E1294U)
	(PIOC) Pad Pull-down Enable Register
#define	REG_PIOC_PPDSR ((__I uint32_t)0x400E1298U)
	(PIOC) Pad Pull-down Status Register
#define	REG_PIOC_PSR ((__I uint32_t)0x400E1208U)
	(PIOC) PIO Status Register
#define	REG_PIOC_PUDR ((__O uint32_t)0x400E1260U)
	(PIOC) Pull-up Disable Register
#define	REG_PIOC_PUER ((__O uint32_t)0x400E1264U)
	(PIOC) Pull-up Enable Register
#define	REG_PIOC_PUSR ((__I uint32_t)0x400E1268U)
	(PIOC) Pad Pull-up Status Register
#define	REG_PIOC_REHLSR ((__O uint32_t)0x400E12D4U)
	(PIOC) Rising Edge/ High Level Select Register
#define	REG_PIOC_SCDR ((__IO uint32_t)0x400E128CU)
	(PIOC) Slow Clock Divider Debouncing Register
#define	REG_PIOC_SCHMITT ((__IO uint32_t)0x400E1300U)
	(PIOC) Schmitt Trigger Register
#define	REG_PIOC_SODR ((__O uint32_t)0x400E1230U)
	(PIOC) Set Output Data Register
#define	REG_PIOC_WPMR ((__IO uint32_t)0x400E12E4U)
	(PIOC) Write Protect Mode Register
#define	REG_PIOC_WPSR ((__I uint32_t)0x400E12E8U)
	(PIOC) Write Protect Status Register

Detailed Description

and its subsidiaries.

\cond ASF_LICENSE

Definition in file instance_pioc.h.

Macro Definition Documentation

◆ REG_PIOC_ABCDSR

#define REG_PIOC_ABCDSR (*(__IO uint32_t*)0x400E1270U)

(PIOC) Peripheral Select Register

Definition at line 117 of file instance_pioc.h.

◆ REG_PIOC_AIMDR

#define REG_PIOC_AIMDR (*(__O uint32_t*)0x400E12B4U)

(PIOC) Additional Interrupt Modes Disables Register

Definition at line 129 of file instance_pioc.h.

◆ REG_PIOC_AIMER

#define REG_PIOC_AIMER (*(__O uint32_t*)0x400E12B0U)

(PIOC) Additional Interrupt Modes Enable Register

Definition at line 128 of file instance_pioc.h.

◆ REG_PIOC_AIMMR

#define REG_PIOC_AIMMR (*(__I uint32_t*)0x400E12B8U)

(PIOC) Additional Interrupt Modes Mask Register

Definition at line 130 of file instance_pioc.h.

◆ REG_PIOC_CODR

#define REG_PIOC_CODR (*(__O uint32_t*)0x400E1234U)

(PIOC) Clear Output Data Register

Definition at line 104 of file instance_pioc.h.

◆ REG_PIOC_ELSR

#define REG_PIOC_ELSR (*(__I uint32_t*)0x400E12C8U)

(PIOC) Edge/Level Status Register

Definition at line 133 of file instance_pioc.h.

◆ REG_PIOC_ESR

#define REG_PIOC_ESR (*(__O uint32_t*)0x400E12C0U)

(PIOC) Edge Select Register

Definition at line 131 of file instance_pioc.h.

◆ REG_PIOC_FELLSR

#define REG_PIOC_FELLSR (*(__O uint32_t*)0x400E12D0U)

(PIOC) Falling Edge/Low Level Select Register

Definition at line 134 of file instance_pioc.h.

◆ REG_PIOC_FRLHSR

#define REG_PIOC_FRLHSR (*(__I uint32_t*)0x400E12D8U)

(PIOC) Fall/Rise - Low/High Status Register

Definition at line 136 of file instance_pioc.h.

◆ REG_PIOC_IDR

#define REG_PIOC_IDR (*(__O uint32_t*)0x400E1244U)

(PIOC) Interrupt Disable Register

Definition at line 108 of file instance_pioc.h.

◆ REG_PIOC_IER

#define REG_PIOC_IER (*(__O uint32_t*)0x400E1240U)

(PIOC) Interrupt Enable Register

Definition at line 107 of file instance_pioc.h.

◆ REG_PIOC_IFDR

#define REG_PIOC_IFDR (*(__O uint32_t*)0x400E1224U)

(PIOC) Glitch Input Filter Disable Register

Definition at line 101 of file instance_pioc.h.

◆ REG_PIOC_IFER

#define REG_PIOC_IFER (*(__O uint32_t*)0x400E1220U)

(PIOC) Glitch Input Filter Enable Register

Definition at line 100 of file instance_pioc.h.

◆ REG_PIOC_IFSCDR

#define REG_PIOC_IFSCDR (*(__O uint32_t*)0x400E1280U)

(PIOC) Input Filter Slow Clock Disable Register

Definition at line 118 of file instance_pioc.h.

◆ REG_PIOC_IFSCER

#define REG_PIOC_IFSCER (*(__O uint32_t*)0x400E1284U)

(PIOC) Input Filter Slow Clock Enable Register

Definition at line 119 of file instance_pioc.h.

◆ REG_PIOC_IFSCSR

#define REG_PIOC_IFSCSR (*(__I uint32_t*)0x400E1288U)

(PIOC) Input Filter Slow Clock Status Register

Definition at line 120 of file instance_pioc.h.

◆ REG_PIOC_IFSR

#define REG_PIOC_IFSR (*(__I uint32_t*)0x400E1228U)

(PIOC) Glitch Input Filter Status Register

Definition at line 102 of file instance_pioc.h.

◆ REG_PIOC_IMR

#define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U)

(PIOC) Interrupt Mask Register

Definition at line 109 of file instance_pioc.h.

◆ REG_PIOC_ISR

#define REG_PIOC_ISR (*(__I uint32_t*)0x400E124CU)

(PIOC) Interrupt Status Register

Definition at line 110 of file instance_pioc.h.

◆ REG_PIOC_LOCKSR

#define REG_PIOC_LOCKSR (*(__I uint32_t*)0x400E12E0U)

(PIOC) Lock Status

Definition at line 137 of file instance_pioc.h.

◆ REG_PIOC_LSR

#define REG_PIOC_LSR (*(__O uint32_t*)0x400E12C4U)

(PIOC) Level Select Register

Definition at line 132 of file instance_pioc.h.

◆ REG_PIOC_MDDR

#define REG_PIOC_MDDR (*(__O uint32_t*)0x400E1254U)

(PIOC) Multi-driver Disable Register

Definition at line 112 of file instance_pioc.h.

◆ REG_PIOC_MDER

#define REG_PIOC_MDER (*(__O uint32_t*)0x400E1250U)

(PIOC) Multi-driver Enable Register

Definition at line 111 of file instance_pioc.h.

◆ REG_PIOC_MDSR

#define REG_PIOC_MDSR (*(__I uint32_t*)0x400E1258U)

(PIOC) Multi-driver Status Register

Definition at line 113 of file instance_pioc.h.

◆ REG_PIOC_ODR

#define REG_PIOC_ODR (*(__O uint32_t*)0x400E1214U)

(PIOC) Output Disable Register

Definition at line 98 of file instance_pioc.h.

◆ REG_PIOC_ODSR

#define REG_PIOC_ODSR (*(__IO uint32_t*)0x400E1238U)

(PIOC) Output Data Status Register

Definition at line 105 of file instance_pioc.h.

◆ REG_PIOC_OER

#define REG_PIOC_OER (*(__O uint32_t*)0x400E1210U)

(PIOC) Output Enable Register

Definition at line 97 of file instance_pioc.h.

◆ REG_PIOC_OSR

#define REG_PIOC_OSR (*(__I uint32_t*)0x400E1218U)

(PIOC) Output Status Register

Definition at line 99 of file instance_pioc.h.

◆ REG_PIOC_OWDR

#define REG_PIOC_OWDR (*(__O uint32_t*)0x400E12A4U)

(PIOC) Output Write Disable

Definition at line 126 of file instance_pioc.h.

◆ REG_PIOC_OWER

#define REG_PIOC_OWER (*(__O uint32_t*)0x400E12A0U)

(PIOC) Output Write Enable

Definition at line 125 of file instance_pioc.h.

◆ REG_PIOC_OWSR

#define REG_PIOC_OWSR (*(__I uint32_t*)0x400E12A8U)

(PIOC) Output Write Status Register

Definition at line 127 of file instance_pioc.h.

◆ REG_PIOC_PCIDR

#define REG_PIOC_PCIDR (*(__O uint32_t*)0x400E1358U)

(PIOC) Parallel Capture Interrupt Disable Register

Definition at line 143 of file instance_pioc.h.

◆ REG_PIOC_PCIER

#define REG_PIOC_PCIER (*(__O uint32_t*)0x400E1354U)

(PIOC) Parallel Capture Interrupt Enable Register

Definition at line 142 of file instance_pioc.h.

◆ REG_PIOC_PCIMR

#define REG_PIOC_PCIMR (*(__I uint32_t*)0x400E135CU)

(PIOC) Parallel Capture Interrupt Mask Register

Definition at line 144 of file instance_pioc.h.

◆ REG_PIOC_PCISR

#define REG_PIOC_PCISR (*(__I uint32_t*)0x400E1360U)

(PIOC) Parallel Capture Interrupt Status Register

Definition at line 145 of file instance_pioc.h.

◆ REG_PIOC_PCMR

#define REG_PIOC_PCMR (*(__IO uint32_t*)0x400E1350U)

(PIOC) Parallel Capture Mode Register

Definition at line 141 of file instance_pioc.h.

◆ REG_PIOC_PCRHR

#define REG_PIOC_PCRHR (*(__I uint32_t*)0x400E1364U)

(PIOC) Parallel Capture Reception Holding Register

Definition at line 146 of file instance_pioc.h.

◆ REG_PIOC_PDR

#define REG_PIOC_PDR (*(__O uint32_t*)0x400E1204U)

(PIOC) PIO Disable Register

Definition at line 95 of file instance_pioc.h.

◆ REG_PIOC_PDSR

#define REG_PIOC_PDSR (*(__I uint32_t*)0x400E123CU)

(PIOC) Pin Data Status Register

Definition at line 106 of file instance_pioc.h.

◆ REG_PIOC_PER

#define REG_PIOC_PER (*(__O uint32_t*)0x400E1200U)

(PIOC) PIO Enable Register

Definition at line 94 of file instance_pioc.h.

◆ REG_PIOC_PPDDR

#define REG_PIOC_PPDDR (*(__O uint32_t*)0x400E1290U)

(PIOC) Pad Pull-down Disable Register

Definition at line 122 of file instance_pioc.h.

◆ REG_PIOC_PPDER

#define REG_PIOC_PPDER (*(__O uint32_t*)0x400E1294U)

(PIOC) Pad Pull-down Enable Register

Definition at line 123 of file instance_pioc.h.

◆ REG_PIOC_PPDSR

#define REG_PIOC_PPDSR (*(__I uint32_t*)0x400E1298U)

(PIOC) Pad Pull-down Status Register

Definition at line 124 of file instance_pioc.h.

◆ REG_PIOC_PSR

#define REG_PIOC_PSR (*(__I uint32_t*)0x400E1208U)

(PIOC) PIO Status Register

Definition at line 96 of file instance_pioc.h.

◆ REG_PIOC_PUDR

#define REG_PIOC_PUDR (*(__O uint32_t*)0x400E1260U)

(PIOC) Pull-up Disable Register

Definition at line 114 of file instance_pioc.h.

◆ REG_PIOC_PUER

#define REG_PIOC_PUER (*(__O uint32_t*)0x400E1264U)

(PIOC) Pull-up Enable Register

Definition at line 115 of file instance_pioc.h.

◆ REG_PIOC_PUSR

#define REG_PIOC_PUSR (*(__I uint32_t*)0x400E1268U)

(PIOC) Pad Pull-up Status Register

Definition at line 116 of file instance_pioc.h.

◆ REG_PIOC_REHLSR

#define REG_PIOC_REHLSR (*(__O uint32_t*)0x400E12D4U)

(PIOC) Rising Edge/ High Level Select Register

Definition at line 135 of file instance_pioc.h.

◆ REG_PIOC_SCDR

#define REG_PIOC_SCDR (*(__IO uint32_t*)0x400E128CU)

(PIOC) Slow Clock Divider Debouncing Register

Definition at line 121 of file instance_pioc.h.

◆ REG_PIOC_SCHMITT

#define REG_PIOC_SCHMITT (*(__IO uint32_t*)0x400E1300U)

(PIOC) Schmitt Trigger Register

Definition at line 140 of file instance_pioc.h.

◆ REG_PIOC_SODR

#define REG_PIOC_SODR (*(__O uint32_t*)0x400E1230U)

(PIOC) Set Output Data Register

Definition at line 103 of file instance_pioc.h.

◆ REG_PIOC_WPMR

#define REG_PIOC_WPMR (*(__IO uint32_t*)0x400E12E4U)

(PIOC) Write Protect Mode Register

Definition at line 138 of file instance_pioc.h.

◆ REG_PIOC_WPSR

#define REG_PIOC_WPSR (*(__I uint32_t*)0x400E12E8U)

(PIOC) Write Protect Status Register

Definition at line 139 of file instance_pioc.h.

Macros