instance_usart0.h

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/*
 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
 */
 
#ifndef _SAM4S_USART0_INSTANCE_
#define _SAM4S_USART0_INSTANCE_
 
/* ========== Register definition for USART0 peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  #define REG_USART0_CR                       (0x40024000U) 
  #define REG_USART0_MR                       (0x40024004U) 
  #define REG_USART0_IER                      (0x40024008U) 
  #define REG_USART0_IDR                      (0x4002400CU) 
  #define REG_USART0_IMR                      (0x40024010U) 
  #define REG_USART0_CSR                      (0x40024014U) 
  #define REG_USART0_RHR                      (0x40024018U) 
  #define REG_USART0_THR                      (0x4002401CU) 
  #define REG_USART0_BRGR                     (0x40024020U) 
  #define REG_USART0_RTOR                     (0x40024024U) 
  #define REG_USART0_TTGR                     (0x40024028U) 
  #define REG_USART0_FIDI                     (0x40024040U) 
  #define REG_USART0_NER                      (0x40024044U) 
  #define REG_USART0_IF                       (0x4002404CU) 
  #define REG_USART0_MAN                      (0x40024050U) 
  #define REG_USART0_WPMR                     (0x400240E4U) 
  #define REG_USART0_WPSR                     (0x400240E8U) 
  #define REG_USART0_VERSION                  (0x400240FCU) 
  #define REG_USART0_RPR                      (0x40024100U) 
  #define REG_USART0_RCR                      (0x40024104U) 
  #define REG_USART0_TPR                      (0x40024108U) 
  #define REG_USART0_TCR                      (0x4002410CU) 
  #define REG_USART0_RNPR                     (0x40024110U) 
  #define REG_USART0_RNCR                     (0x40024114U) 
  #define REG_USART0_TNPR                     (0x40024118U) 
  #define REG_USART0_TNCR                     (0x4002411CU) 
  #define REG_USART0_PTCR                     (0x40024120U) 
  #define REG_USART0_PTSR                     (0x40024124U) 
#else
  #define REG_USART0_CR      (*(__O  uint32_t*)0x40024000U) 
  #define REG_USART0_MR      (*(__IO uint32_t*)0x40024004U) 
  #define REG_USART0_IER     (*(__O  uint32_t*)0x40024008U) 
  #define REG_USART0_IDR     (*(__O  uint32_t*)0x4002400CU) 
  #define REG_USART0_IMR     (*(__I  uint32_t*)0x40024010U) 
  #define REG_USART0_CSR     (*(__I  uint32_t*)0x40024014U) 
  #define REG_USART0_RHR     (*(__I  uint32_t*)0x40024018U) 
  #define REG_USART0_THR     (*(__O  uint32_t*)0x4002401CU) 
  #define REG_USART0_BRGR    (*(__IO uint32_t*)0x40024020U) 
  #define REG_USART0_RTOR    (*(__IO uint32_t*)0x40024024U) 
  #define REG_USART0_TTGR    (*(__IO uint32_t*)0x40024028U) 
  #define REG_USART0_FIDI    (*(__IO uint32_t*)0x40024040U) 
  #define REG_USART0_NER     (*(__I  uint32_t*)0x40024044U) 
  #define REG_USART0_IF      (*(__IO uint32_t*)0x4002404CU) 
  #define REG_USART0_MAN     (*(__IO uint32_t*)0x40024050U) 
  #define REG_USART0_WPMR    (*(__IO uint32_t*)0x400240E4U) 
  #define REG_USART0_WPSR    (*(__I  uint32_t*)0x400240E8U) 
  #define REG_USART0_VERSION (*(__I  uint32_t*)0x400240FCU) 
  #define REG_USART0_RPR     (*(__IO uint32_t*)0x40024100U) 
  #define REG_USART0_RCR     (*(__IO uint32_t*)0x40024104U) 
  #define REG_USART0_TPR     (*(__IO uint32_t*)0x40024108U) 
  #define REG_USART0_TCR     (*(__IO uint32_t*)0x4002410CU) 
  #define REG_USART0_RNPR    (*(__IO uint32_t*)0x40024110U) 
  #define REG_USART0_RNCR    (*(__IO uint32_t*)0x40024114U) 
  #define REG_USART0_TNPR    (*(__IO uint32_t*)0x40024118U) 
  #define REG_USART0_TNCR    (*(__IO uint32_t*)0x4002411CU) 
  #define REG_USART0_PTCR    (*(__O  uint32_t*)0x40024120U) 
  #define REG_USART0_PTSR    (*(__I  uint32_t*)0x40024124U) 
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
 
#endif /* _SAM4S_USART0_INSTANCE_ */