instance_usart0.h File Reference

Copyright (c) 2012-2018 Microchip Technology Inc. More...

Go to the source code of this file.

Macros
#define	REG_USART0_BRGR   (*(__IO uint32_t*)0x40024020U)
	(USART0) Baud Rate Generator Register
#define	REG_USART0_CR   (*(__O uint32_t*)0x40024000U)
	(USART0) Control Register
#define	REG_USART0_CSR   (*(__I uint32_t*)0x40024014U)
	(USART0) Channel Status Register
#define	REG_USART0_FIDI   (*(__IO uint32_t*)0x40024040U)
	(USART0) FI DI Ratio Register
#define	REG_USART0_IDR   (*(__O uint32_t*)0x4002400CU)
	(USART0) Interrupt Disable Register
#define	REG_USART0_IER   (*(__O uint32_t*)0x40024008U)
	(USART0) Interrupt Enable Register
#define	REG_USART0_IF   (*(__IO uint32_t*)0x4002404CU)
	(USART0) IrDA Filter Register
#define	REG_USART0_IMR   (*(__I uint32_t*)0x40024010U)
	(USART0) Interrupt Mask Register
#define	REG_USART0_MAN   (*(__IO uint32_t*)0x40024050U)
	(USART0) Manchester Encoder Decoder Register
#define	REG_USART0_MR   (*(__IO uint32_t*)0x40024004U)
	(USART0) Mode Register
#define	REG_USART0_NER   (*(__I uint32_t*)0x40024044U)
	(USART0) Number of Errors Register
#define	REG_USART0_PTCR   (*(__O uint32_t*)0x40024120U)
	(USART0) Transfer Control Register
#define	REG_USART0_PTSR   (*(__I uint32_t*)0x40024124U)
	(USART0) Transfer Status Register
#define	REG_USART0_RCR   (*(__IO uint32_t*)0x40024104U)
	(USART0) Receive Counter Register
#define	REG_USART0_RHR   (*(__I uint32_t*)0x40024018U)
	(USART0) Receiver Holding Register
#define	REG_USART0_RNCR   (*(__IO uint32_t*)0x40024114U)
	(USART0) Receive Next Counter Register
#define	REG_USART0_RNPR   (*(__IO uint32_t*)0x40024110U)
	(USART0) Receive Next Pointer Register
#define	REG_USART0_RPR   (*(__IO uint32_t*)0x40024100U)
	(USART0) Receive Pointer Register
#define	REG_USART0_RTOR   (*(__IO uint32_t*)0x40024024U)
	(USART0) Receiver Time-out Register
#define	REG_USART0_TCR   (*(__IO uint32_t*)0x4002410CU)
	(USART0) Transmit Counter Register
#define	REG_USART0_THR   (*(__O uint32_t*)0x4002401CU)
	(USART0) Transmitter Holding Register
#define	REG_USART0_TNCR   (*(__IO uint32_t*)0x4002411CU)
	(USART0) Transmit Next Counter Register
#define	REG_USART0_TNPR   (*(__IO uint32_t*)0x40024118U)
	(USART0) Transmit Next Pointer Register
#define	REG_USART0_TPR   (*(__IO uint32_t*)0x40024108U)
	(USART0) Transmit Pointer Register
#define	REG_USART0_TTGR   (*(__IO uint32_t*)0x40024028U)
	(USART0) Transmitter Timeguard Register
#define	REG_USART0_VERSION   (*(__I uint32_t*)0x400240FCU)
	(USART0) Version Register
#define	REG_USART0_WPMR   (*(__IO uint32_t*)0x400240E4U)
	(USART0) Write Protect Mode Register
#define	REG_USART0_WPSR   (*(__I uint32_t*)0x400240E8U)
	(USART0) Write Protect Status Register

Detailed Description

Copyright (c) 2012-2018 Microchip Technology Inc.

and its subsidiaries.

\cond ASF_LICENSE

Definition in file instance_usart0.h.

Macro Definition Documentation

REG_USART0_BRGR

#define REG_USART0_BRGR   (*(__IO uint32_t*)0x40024020U)

(USART0) Baud Rate Generator Register

Definition at line 77 of file instance_usart0.h.

REG_USART0_CR

#define REG_USART0_CR   (*(__O uint32_t*)0x40024000U)

(USART0) Control Register

Definition at line 69 of file instance_usart0.h.

REG_USART0_CSR

#define REG_USART0_CSR   (*(__I uint32_t*)0x40024014U)

(USART0) Channel Status Register

Definition at line 74 of file instance_usart0.h.

REG_USART0_FIDI

#define REG_USART0_FIDI   (*(__IO uint32_t*)0x40024040U)

(USART0) FI DI Ratio Register

Definition at line 80 of file instance_usart0.h.

REG_USART0_IDR

#define REG_USART0_IDR   (*(__O uint32_t*)0x4002400CU)

(USART0) Interrupt Disable Register

Definition at line 72 of file instance_usart0.h.

REG_USART0_IER

#define REG_USART0_IER   (*(__O uint32_t*)0x40024008U)

(USART0) Interrupt Enable Register

Definition at line 71 of file instance_usart0.h.

REG_USART0_IF

#define REG_USART0_IF   (*(__IO uint32_t*)0x4002404CU)

(USART0) IrDA Filter Register

Definition at line 82 of file instance_usart0.h.

REG_USART0_IMR

#define REG_USART0_IMR   (*(__I uint32_t*)0x40024010U)

(USART0) Interrupt Mask Register

Definition at line 73 of file instance_usart0.h.

REG_USART0_MAN

#define REG_USART0_MAN   (*(__IO uint32_t*)0x40024050U)

(USART0) Manchester Encoder Decoder Register

Definition at line 83 of file instance_usart0.h.

REG_USART0_MR

#define REG_USART0_MR   (*(__IO uint32_t*)0x40024004U)

(USART0) Mode Register

Definition at line 70 of file instance_usart0.h.

REG_USART0_NER

#define REG_USART0_NER   (*(__I uint32_t*)0x40024044U)

(USART0) Number of Errors Register

Definition at line 81 of file instance_usart0.h.

REG_USART0_PTCR

#define REG_USART0_PTCR   (*(__O uint32_t*)0x40024120U)

(USART0) Transfer Control Register

Definition at line 95 of file instance_usart0.h.

REG_USART0_PTSR

#define REG_USART0_PTSR   (*(__I uint32_t*)0x40024124U)

(USART0) Transfer Status Register

Definition at line 96 of file instance_usart0.h.

REG_USART0_RCR

#define REG_USART0_RCR   (*(__IO uint32_t*)0x40024104U)

(USART0) Receive Counter Register

Definition at line 88 of file instance_usart0.h.

REG_USART0_RHR

#define REG_USART0_RHR   (*(__I uint32_t*)0x40024018U)

(USART0) Receiver Holding Register

Definition at line 75 of file instance_usart0.h.

REG_USART0_RNCR

#define REG_USART0_RNCR   (*(__IO uint32_t*)0x40024114U)

(USART0) Receive Next Counter Register

Definition at line 92 of file instance_usart0.h.

REG_USART0_RNPR

#define REG_USART0_RNPR   (*(__IO uint32_t*)0x40024110U)

(USART0) Receive Next Pointer Register

Definition at line 91 of file instance_usart0.h.

REG_USART0_RPR

#define REG_USART0_RPR   (*(__IO uint32_t*)0x40024100U)

(USART0) Receive Pointer Register

Definition at line 87 of file instance_usart0.h.

REG_USART0_RTOR

#define REG_USART0_RTOR   (*(__IO uint32_t*)0x40024024U)

(USART0) Receiver Time-out Register

Definition at line 78 of file instance_usart0.h.

REG_USART0_TCR

#define REG_USART0_TCR   (*(__IO uint32_t*)0x4002410CU)

(USART0) Transmit Counter Register

Definition at line 90 of file instance_usart0.h.

REG_USART0_THR

#define REG_USART0_THR   (*(__O uint32_t*)0x4002401CU)

(USART0) Transmitter Holding Register

Definition at line 76 of file instance_usart0.h.

REG_USART0_TNCR

#define REG_USART0_TNCR   (*(__IO uint32_t*)0x4002411CU)

(USART0) Transmit Next Counter Register

Definition at line 94 of file instance_usart0.h.

REG_USART0_TNPR

#define REG_USART0_TNPR   (*(__IO uint32_t*)0x40024118U)

(USART0) Transmit Next Pointer Register

Definition at line 93 of file instance_usart0.h.

REG_USART0_TPR

#define REG_USART0_TPR   (*(__IO uint32_t*)0x40024108U)

(USART0) Transmit Pointer Register

Definition at line 89 of file instance_usart0.h.

REG_USART0_TTGR

#define REG_USART0_TTGR   (*(__IO uint32_t*)0x40024028U)

(USART0) Transmitter Timeguard Register

Definition at line 79 of file instance_usart0.h.

REG_USART0_VERSION

#define REG_USART0_VERSION   (*(__I uint32_t*)0x400240FCU)

(USART0) Version Register

Definition at line 86 of file instance_usart0.h.

REG_USART0_WPMR

#define REG_USART0_WPMR   (*(__IO uint32_t*)0x400240E4U)

(USART0) Write Protect Mode Register

Definition at line 84 of file instance_usart0.h.

REG_USART0_WPSR

#define REG_USART0_WPSR   (*(__I uint32_t*)0x400240E8U)

(USART0) Write Protect Status Register

Definition at line 85 of file instance_usart0.h.