SAM4SD32-SAM4S-EK2-IMT-Docs/html/instance__usart1_8h_source.html

/*

 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>

 */


#ifndef _SAM4S_USART1_INSTANCE_

#define _SAM4S_USART1_INSTANCE_


/* ========== Register definition for USART1 peripheral ========== */

#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

  #define REG_USART1_CR                       (0x40028000U)

  #define REG_USART1_MR                       (0x40028004U)

  #define REG_USART1_IER                      (0x40028008U)

  #define REG_USART1_IDR                      (0x4002800CU)

  #define REG_USART1_IMR                      (0x40028010U)

  #define REG_USART1_CSR                      (0x40028014U)

  #define REG_USART1_RHR                      (0x40028018U)

  #define REG_USART1_THR                      (0x4002801CU)

  #define REG_USART1_BRGR                     (0x40028020U)

  #define REG_USART1_RTOR                     (0x40028024U)

  #define REG_USART1_TTGR                     (0x40028028U)

  #define REG_USART1_FIDI                     (0x40028040U)

  #define REG_USART1_NER                      (0x40028044U)

  #define REG_USART1_IF                       (0x4002804CU)

  #define REG_USART1_MAN                      (0x40028050U)

  #define REG_USART1_WPMR                     (0x400280E4U)

  #define REG_USART1_WPSR                     (0x400280E8U)

  #define REG_USART1_VERSION                  (0x400280FCU)

  #define REG_USART1_RPR                      (0x40028100U)

  #define REG_USART1_RCR                      (0x40028104U)

  #define REG_USART1_TPR                      (0x40028108U)

  #define REG_USART1_TCR                      (0x4002810CU)

  #define REG_USART1_RNPR                     (0x40028110U)

  #define REG_USART1_RNCR                     (0x40028114U)

  #define REG_USART1_TNPR                     (0x40028118U)

  #define REG_USART1_TNCR                     (0x4002811CU)

  #define REG_USART1_PTCR                     (0x40028120U)

  #define REG_USART1_PTSR                     (0x40028124U)

#else

  #define REG_USART1_CR      (*(__O  uint32_t*)0x40028000U)

  #define REG_USART1_MR      (*(__IO uint32_t*)0x40028004U)

  #define REG_USART1_IER     (*(__O  uint32_t*)0x40028008U)

  #define REG_USART1_IDR     (*(__O  uint32_t*)0x4002800CU)

  #define REG_USART1_IMR     (*(__I  uint32_t*)0x40028010U)

  #define REG_USART1_CSR     (*(__I  uint32_t*)0x40028014U)

  #define REG_USART1_RHR     (*(__I  uint32_t*)0x40028018U)

  #define REG_USART1_THR     (*(__O  uint32_t*)0x4002801CU)

  #define REG_USART1_BRGR    (*(__IO uint32_t*)0x40028020U)

  #define REG_USART1_RTOR    (*(__IO uint32_t*)0x40028024U)

  #define REG_USART1_TTGR    (*(__IO uint32_t*)0x40028028U)

  #define REG_USART1_FIDI    (*(__IO uint32_t*)0x40028040U)

  #define REG_USART1_NER     (*(__I  uint32_t*)0x40028044U)

  #define REG_USART1_IF      (*(__IO uint32_t*)0x4002804CU)

  #define REG_USART1_MAN     (*(__IO uint32_t*)0x40028050U)

  #define REG_USART1_WPMR    (*(__IO uint32_t*)0x400280E4U)

  #define REG_USART1_WPSR    (*(__I  uint32_t*)0x400280E8U)

  #define REG_USART1_VERSION (*(__I  uint32_t*)0x400280FCU)

  #define REG_USART1_RPR     (*(__IO uint32_t*)0x40028100U)

  #define REG_USART1_RCR     (*(__IO uint32_t*)0x40028104U)

  #define REG_USART1_TPR     (*(__IO uint32_t*)0x40028108U)

  #define REG_USART1_TCR     (*(__IO uint32_t*)0x4002810CU)

  #define REG_USART1_RNPR    (*(__IO uint32_t*)0x40028110U)

  #define REG_USART1_RNCR    (*(__IO uint32_t*)0x40028114U)

  #define REG_USART1_TNPR    (*(__IO uint32_t*)0x40028118U)

  #define REG_USART1_TNCR    (*(__IO uint32_t*)0x4002811CU)

  #define REG_USART1_PTCR    (*(__O  uint32_t*)0x40028120U)

  #define REG_USART1_PTSR    (*(__I  uint32_t*)0x40028124U)

#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


#endif /* _SAM4S_USART1_INSTANCE_ */