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SAM4SD32 (SAM4S-EK2)
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PwmCh_num hardware registers. More...
#include <component_pwm.h>
Data Fields | |
| __I uint32_t | PWM_CCNT |
| (PwmCh_num Offset: 0x14) PWM Channel Counter Register | |
| __IO uint32_t | PWM_CDTY |
| (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register | |
| __O uint32_t | PWM_CDTYUPD |
| (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register | |
| __IO uint32_t | PWM_CMR |
| (PwmCh_num Offset: 0x0) PWM Channel Mode Register | |
| __IO uint32_t | PWM_CPRD |
| (PwmCh_num Offset: 0xC) PWM Channel Period Register | |
| __O uint32_t | PWM_CPRDUPD |
| (PwmCh_num Offset: 0x10) PWM Channel Period Update Register | |
| __IO uint32_t | PWM_DT |
| (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register | |
| __O uint32_t | PWM_DTUPD |
| (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register | |
PwmCh_num hardware registers.
Definition at line 46 of file component_pwm.h.
| __I uint32_t PwmCh_num::PWM_CCNT |
(PwmCh_num Offset: 0x14) PWM Channel Counter Register
Definition at line 52 of file component_pwm.h.
Referenced by pwm_channel_get_counter().
| __IO uint32_t PwmCh_num::PWM_CDTY |
(PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register
Definition at line 48 of file component_pwm.h.
Referenced by pwm_channel_init().
| __O uint32_t PwmCh_num::PWM_CDTYUPD |
(PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register
Definition at line 49 of file component_pwm.h.
Referenced by pwm_channel_update_duty().
| __IO uint32_t PwmCh_num::PWM_CMR |
(PwmCh_num Offset: 0x0) PWM Channel Mode Register
Definition at line 47 of file component_pwm.h.
Referenced by pwm_channel_init(), pwm_channel_update_duty(), and pwm_channel_update_period().
| __IO uint32_t PwmCh_num::PWM_CPRD |
(PwmCh_num Offset: 0xC) PWM Channel Period Register
Definition at line 50 of file component_pwm.h.
Referenced by pwm_channel_init().
| __O uint32_t PwmCh_num::PWM_CPRDUPD |
(PwmCh_num Offset: 0x10) PWM Channel Period Update Register
Definition at line 51 of file component_pwm.h.
Referenced by pwm_channel_update_period().
| __IO uint32_t PwmCh_num::PWM_DT |
(PwmCh_num Offset: 0x18) PWM Channel Dead Time Register
Definition at line 53 of file component_pwm.h.
Referenced by pwm_channel_init().
| __O uint32_t PwmCh_num::PWM_DTUPD |
(PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register
Definition at line 54 of file component_pwm.h.
Referenced by pwm_channel_update_dead_time().