SAM4SD32 (SAM4S-EK2)
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pio.h
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1
33/*
34 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
35 */
36
37#ifndef PIO_H_INCLUDED
38#define PIO_H_INCLUDED
39
40#include "compiler.h"
41
42#ifdef __cplusplus
43extern "C" {
44#endif
45
46/* Compute PIO register length */
47#define PIO_DELTA ((uint32_t) PIOB - (uint32_t) PIOA)
48
49/* GPIO Support */
50#define PIO_TYPE_Pos 27
51/* PIO Type Mask */
52#define PIO_TYPE_Msk (0xFu << PIO_TYPE_Pos)
53/* The pin is not a function pin. */
54#define PIO_TYPE_NOT_A_PIN (0x0u << PIO_TYPE_Pos)
55/* The pin is controlled by the peripheral A. */
56#define PIO_TYPE_PIO_PERIPH_A (0x1u << PIO_TYPE_Pos)
57/* The pin is controlled by the peripheral B. */
58#define PIO_TYPE_PIO_PERIPH_B (0x2u << PIO_TYPE_Pos)
59/* The pin is controlled by the peripheral C. */
60#define PIO_TYPE_PIO_PERIPH_C (0x3u << PIO_TYPE_Pos)
61/* The pin is controlled by the peripheral D. */
62#define PIO_TYPE_PIO_PERIPH_D (0x4u << PIO_TYPE_Pos)
63/* The pin is an input. */
64#define PIO_TYPE_PIO_INPUT (0x5u << PIO_TYPE_Pos)
65/* The pin is an output and has a default level of 0. */
66#define PIO_TYPE_PIO_OUTPUT_0 (0x6u << PIO_TYPE_Pos)
67/* The pin is an output and has a default level of 1. */
68#define PIO_TYPE_PIO_OUTPUT_1 (0x7u << PIO_TYPE_Pos)
69
82
83/* Default pin configuration (no attribute). */
84#define PIO_DEFAULT (0u << 0)
85/* The internal pin pull-up is active. */
86#define PIO_PULLUP (1u << 0)
87/* The internal glitch filter is active. */
88#define PIO_DEGLITCH (1u << 1)
89/* The pin is open-drain. */
90#define PIO_OPENDRAIN (1u << 2)
91
92/* The internal debouncing filter is active. */
93#define PIO_DEBOUNCE (1u << 3)
94
95/* Enable additional interrupt modes. */
96#define PIO_IT_AIME (1u << 4)
97
98/* Interrupt High Level/Rising Edge detection is active. */
99#define PIO_IT_RE_OR_HL (1u << 5)
100/* Interrupt Edge detection is active. */
101#define PIO_IT_EDGE (1u << 6)
102
103/* Low level interrupt is active */
104#define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME)
105/* High level interrupt is active */
106#define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME)
107/* Falling edge interrupt is active */
108#define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME)
109/* Rising edge interrupt is active */
110#define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME)
111
112/*
113 * The #attribute# field is a bitmask that can either be set to PIO_DEFAULT,
114 * or combine (using bitwise OR '|') any number of the following constants:
115 * - PIO_PULLUP
116 * - PIO_DEGLITCH
117 * - PIO_DEBOUNCE
118 * - PIO_OPENDRAIN
119 * - PIO_IT_LOW_LEVEL
120 * - PIO_IT_HIGH_LEVEL
121 * - PIO_IT_FALL_EDGE
122 * - PIO_IT_RISE_EDGE
123 */
124void pio_pull_up(Pio *p_pio, const uint32_t ul_mask,
125 const uint32_t ul_pull_up_enable);
126void pio_set_debounce_filter(Pio *p_pio, const uint32_t ul_mask,
127 const uint32_t ul_cut_off);
128void pio_set(Pio *p_pio, const uint32_t ul_mask);
129void pio_clear(Pio *p_pio, const uint32_t ul_mask);
130uint32_t pio_get(Pio *p_pio, const pio_type_t ul_type,
131 const uint32_t ul_mask);
132void pio_set_peripheral(Pio *p_pio, const pio_type_t ul_type,
133 const uint32_t ul_mask);
134void pio_set_input(Pio *p_pio, const uint32_t ul_mask,
135 const uint32_t ul_attribute);
136void pio_set_output(Pio *p_pio, const uint32_t ul_mask,
137 const uint32_t ul_default_level,
138 const uint32_t ul_multidrive_enable,
139 const uint32_t ul_pull_up_enable);
140uint32_t pio_configure(Pio *p_pio, const pio_type_t ul_type,
141 const uint32_t ul_mask, const uint32_t ul_attribute);
142uint32_t pio_get_output_data_status(const Pio *p_pio,
143 const uint32_t ul_mask);
144void pio_set_multi_driver(Pio *p_pio, const uint32_t ul_mask,
145 const uint32_t ul_multi_driver_enable);
146uint32_t pio_get_multi_driver_status(const Pio *p_pio);
147
148#if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)
149void pio_pull_down(Pio *p_pio, const uint32_t ul_mask,
150 const uint32_t ul_pull_down_enable);
151#endif
152
153void pio_enable_output_write(Pio *p_pio, const uint32_t ul_mask);
154void pio_disable_output_write(Pio *p_pio, const uint32_t ul_mask);
155uint32_t pio_get_output_write_status(const Pio *p_pio);
156void pio_sync_output_write(Pio *p_pio, const uint32_t ul_mask);
157
158#if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)
159void pio_set_schmitt_trigger(Pio *p_pio, const uint32_t ul_mask);
160uint32_t pio_get_schmitt_trigger(const Pio *p_pio);
161#endif
162
163void pio_configure_interrupt(Pio *p_pio, const uint32_t ul_mask,
164 const uint32_t ul_attr);
165void pio_enable_interrupt(Pio *p_pio, const uint32_t ul_mask);
166void pio_disable_interrupt(Pio *p_pio, const uint32_t ul_mask);
167uint32_t pio_get_interrupt_status(const Pio *p_pio);
168uint32_t pio_get_interrupt_mask(const Pio *p_pio);
170 const uint32_t ul_mask, const uint32_t ul_attribute);
171void pio_set_writeprotect(Pio *p_pio, const uint32_t ul_enable);
172uint32_t pio_get_writeprotect_status(const Pio *p_pio);
173
174#if (SAM3S || SAM4S || SAM4E || SAMV71 || SAMV70 || SAME70 || SAMS70)
175void pio_capture_set_mode(Pio *p_pio, uint32_t ul_mode);
176void pio_capture_enable(Pio *p_pio);
177void pio_capture_disable(Pio *p_pio);
178uint32_t pio_capture_read(const Pio *p_pio, uint32_t * pul_data);
179void pio_capture_enable_interrupt(Pio *p_pio, const uint32_t ul_mask);
180void pio_capture_disable_interrupt(Pio * p_pio, const uint32_t ul_mask);
181uint32_t pio_capture_get_interrupt_status(const Pio *p_pio);
182uint32_t pio_capture_get_interrupt_mask(const Pio *p_pio);
183#if !(SAMV71 || SAMV70 || SAME70 || SAMS70)
184Pdc *pio_capture_get_pdc_base(const Pio *p_pio);
185#endif
186#endif
187
188/* GPIO Support */
189uint32_t pio_get_pin_value(uint32_t pin);
190void pio_set_pin_high(uint32_t pin);
191void pio_set_pin_low(uint32_t pin);
192void pio_toggle_pin(uint32_t pin);
193void pio_enable_pin_interrupt(uint32_t pin);
194void pio_disable_pin_interrupt(uint32_t pin);
195Pio *pio_get_pin_group(uint32_t pin);
196uint32_t pio_get_pin_group_id(uint32_t pin);
197uint32_t pio_get_pin_group_mask(uint32_t pin);
198uint32_t pio_configure_pin(uint32_t ul_pin, const uint32_t ul_flags);
199void pio_set_pin_group_high(Pio *p_pio, uint32_t ul_mask);
200void pio_set_pin_group_low(Pio *p_pio, uint32_t ul_mask);
201void pio_toggle_pin_group(Pio *p_pio, uint32_t ul_mask);
202uint32_t pio_configure_pin_group(Pio *p_pio, uint32_t ul_mask,
203 const uint32_t ul_flags);
204
205#if (SAM4C || SAM4CP || SAM4CM || SAMG55 || SAMV71 || SAMV70 || SAME70 || SAMS70)
206enum pio_io_drive_mode {
207 PIO_IO_DRIVE_LOW = 0,
208 PIO_IO_DRIVE_HIGH,
209};
210void pio_set_io_drive(Pio *p_pio, uint32_t ul_line,
211 enum pio_io_drive_mode mode);
212#endif
213
214#if (SAMV71 || SAMV70 || SAME70 || SAMS70)
215void pio_keypad_enable(Pio *p_pio);
216void pio_keypad_disable(Pio *p_pio);
217void pio_keypad_set_row_num(Pio *p_pio, uint8_t num);
218uint8_t pio_keypad_get_row_num(const Pio *p_pio);
219void pio_keypad_set_column_num(Pio *p_pio, uint8_t num);
220uint8_t pio_keypad_get_column_num(const Pio *p_pio);
221void pio_keypad_set_debouncing_value(Pio *p_pio, uint16_t value);
222uint16_t pio_keypad_get_debouncing_value(const Pio *p_pio);
223void pio_keypad_enable_interrupt(Pio *p_pio, uint32_t ul_mask);
224void pio_keypad_disable_interrupt(Pio *p_pio, uint32_t ul_mask);
225uint32_t pio_keypad_get_interrupt_mask(const Pio *p_pio);
226uint32_t pio_keypad_get_press_status(const Pio *p_pio);
227uint32_t pio_keypad_get_release_status(const Pio *p_pio);
228uint8_t pio_keypad_get_simult_press_num(const Pio *p_pio);
229uint8_t pio_keypad_get_simult_release_num(const Pio *p_pio);
230uint8_t pio_keypad_get_press_row_index(const Pio *p_pio, uint8_t queue);
231uint8_t pio_keypad_get_press_column_index(const Pio *p_pio, uint8_t queue);
232uint8_t pio_keypad_get_release_row_index(const Pio *p_pio, uint8_t queue);
233uint8_t pio_keypad_get_release_column_index(const Pio *p_pio, uint8_t queue);
234#endif
295
362
363#ifdef __cplusplus
364}
365#endif
366
367#endif /* PIO_H_INCLUDED */
uint32_t pio_get_pin_value(uint32_t pin)
Return the value of a pin.
Definition pio.c:697
void pio_set_pin_group_high(Pio *p_pio, uint32_t ul_mask)
Drive a GPIO port to 1.
Definition pio.c:818
void pio_enable_pin_interrupt(uint32_t pin)
Enable interrupt for a GPIO pin.
Definition pio.c:914
void pio_configure_interrupt(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_attr)
Configure the given interrupt source.
Definition pio.c:538
void pio_disable_interrupt(Pio *p_pio, const uint32_t ul_mask)
Disable a given interrupt source, with no added side effects.
Definition pio.c:589
void pio_set_peripheral(Pio *p_pio, const pio_type_t ul_type, const uint32_t ul_mask)
Configure IO of a PIO controller as being controlled by a specific peripheral.
Definition pio.c:174
void pio_set_input(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_attribute)
Configure one or more pin(s) or a PIO controller as inputs.
Definition pio.c:257
void pio_pull_down(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_pull_down_enable)
Configure PIO pin internal pull-down.
Definition pio.c:443
uint32_t pio_get_writeprotect_status(const Pio *p_pio)
Read write protect status.
Definition pio.c:679
uint32_t pio_capture_get_interrupt_status(const Pio *p_pio)
Read PIO interrupt status of PIO capture.
Definition pio.c:1124
uint32_t pio_get_pin_group_mask(uint32_t pin)
Return GPIO port pin mask for a GPIO pin.
Definition pio.c:1025
void pio_capture_disable_interrupt(Pio *p_pio, const uint32_t ul_mask)
Disable a given interrupt source of PIO capture.
Definition pio.c:1112
void pio_capture_enable_interrupt(Pio *p_pio, const uint32_t ul_mask)
Enable the given interrupt source of PIO capture.
Definition pio.c:1100
uint32_t pio_get(Pio *p_pio, const pio_type_t ul_type, const uint32_t ul_mask)
Return 1 if one or more PIOs of the given Pin instance currently have a high level; otherwise returns...
Definition pio.c:148
void pio_enable_interrupt(Pio *p_pio, const uint32_t ul_mask)
Enable the given interrupt source.
Definition pio.c:578
uint32_t pio_get_interrupt_status(const Pio *p_pio)
Read and clear PIO interrupt status.
Definition pio.c:601
void pio_set_pin_low(uint32_t pin)
Drive a GPIO pin to 0.
Definition pio.c:726
uint32_t pio_get_pin_group_id(uint32_t pin)
Return GPIO port peripheral ID for a GPIO pin.
Definition pio.c:979
uint32_t pio_get_output_data_status(const Pio *p_pio, const uint32_t ul_mask)
Return 1 if one or more PIOs of the given Pin are configured to output a high level (even if they are...
Definition pio.c:392
void pio_clear(Pio *p_pio, const uint32_t ul_mask)
Set a low output level on all the PIOs defined in ul_mask.
Definition pio.c:130
void pio_set_debounce_filter(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_cut_off)
Configure Glitch or Debouncing filter for the specified input(s).
Definition pio.c:87
void pio_set_additional_interrupt_mode(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_attribute)
Set additional interrupt mode.
Definition pio.c:625
void pio_toggle_pin_group(Pio *p_pio, uint32_t ul_mask)
Toggle a GPIO group.
Definition pio.c:842
uint32_t pio_configure_pin_group(Pio *p_pio, uint32_t ul_mask, const uint32_t ul_flags)
Perform complete pin(s) configuration; general attributes and PIO init if necessary.
Definition pio.c:863
uint32_t pio_configure_pin(uint32_t ul_pin, const uint32_t ul_flags)
Perform complete pin(s) configuration; general attributes and PIO init if necessary.
Definition pio.c:763
uint32_t pio_get_multi_driver_status(const Pio *p_pio)
Get multi-driver status.
Definition pio.c:428
void pio_toggle_pin(uint32_t pin)
Toggle a GPIO pin.
Definition pio.c:741
void pio_set_writeprotect(Pio *p_pio, const uint32_t ul_enable)
Enable or disable write protect of PIO registers.
Definition pio.c:667
uint32_t pio_capture_get_interrupt_mask(const Pio *p_pio)
Read PIO interrupt mask of PIO capture.
Definition pio.c:1136
uint32_t pio_get_interrupt_mask(const Pio *p_pio)
Read PIO interrupt mask.
Definition pio.c:613
uint32_t pio_get_schmitt_trigger(const Pio *p_pio)
Get PIO pin schmitt trigger status.
Definition pio.c:523
uint32_t pio_capture_read(const Pio *p_pio, uint32_t *pul_data)
Read from Capture Reception Holding Register.
Definition pio.c:1080
void pio_enable_output_write(Pio *p_pio, const uint32_t ul_mask)
Enable PIO output write for synchronous data output.
Definition pio.c:461
Pdc * pio_capture_get_pdc_base(const Pio *p_pio)
Get PDC registers base address.
Definition pio.c:1148
void pio_set_schmitt_trigger(Pio *p_pio, const uint32_t ul_mask)
Configure PIO pin schmitt trigger.
Definition pio.c:511
void pio_set_pin_high(uint32_t pin)
Drive a GPIO pin to 1.
Definition pio.c:711
void pio_pull_up(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_pull_up_enable)
Configure PIO internal pull-up.
Definition pio.c:69
void pio_disable_pin_interrupt(uint32_t pin)
Disable interrupt for a GPIO pin.
Definition pio.c:929
void pio_set_pin_group_low(Pio *p_pio, uint32_t ul_mask)
Drive a GPIO port to 0.
Definition pio.c:830
uint32_t pio_get_output_write_status(const Pio *p_pio)
Read PIO output write status.
Definition pio.c:484
void pio_disable_output_write(Pio *p_pio, const uint32_t ul_mask)
Disable PIO output write.
Definition pio.c:472
void pio_capture_enable(Pio *p_pio)
Enable PIO capture mode.
Definition pio.c:1053
uint32_t pio_configure(Pio *p_pio, const pio_type_t ul_type, const uint32_t ul_mask, const uint32_t ul_attribute)
Perform complete pin(s) configuration; general attributes and PIO init if necessary.
Definition pio.c:348
void pio_sync_output_write(Pio *p_pio, const uint32_t ul_mask)
Synchronously write on output pins.
Definition pio.c:497
void pio_capture_set_mode(Pio *p_pio, uint32_t ul_mode)
Configure PIO capture mode.
Definition pio.c:1042
void pio_set_multi_driver(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_multi_driver_enable)
Configure PIO pin multi-driver.
Definition pio.c:410
void pio_set_output(Pio *p_pio, const uint32_t ul_mask, const uint32_t ul_default_level, const uint32_t ul_multidrive_enable, const uint32_t ul_pull_up_enable)
Configure one or more pin(s) of a PIO controller as outputs, with the given default value.
Definition pio.c:310
Pio * pio_get_pin_group(uint32_t pin)
Return GPIO port for a GPIO pin.
Definition pio.c:944
void pio_set(Pio *p_pio, const uint32_t ul_mask)
Set a high output level on all the PIOs defined in ul_mask.
Definition pio.c:117
void pio_capture_disable(Pio *p_pio)
Disable PIO capture mode.
Definition pio.c:1064
#define PIO_TYPE_PIO_OUTPUT_0
Definition pio.h:66
#define PIO_TYPE_PIO_OUTPUT_1
Definition pio.h:68
#define PIO_TYPE_PIO_PERIPH_B
Definition pio.h:58
_pio_type
Definition pio.h:70
@ PIO_OUTPUT_0
Definition pio.h:79
@ PIO_OUTPUT_1
Definition pio.h:80
@ PIO_PERIPH_B
Definition pio.h:73
@ PIO_PERIPH_A
Definition pio.h:72
@ PIO_PERIPH_C
Definition pio.h:75
@ PIO_INPUT
Definition pio.h:78
@ PIO_NOT_A_PIN
Definition pio.h:71
@ PIO_PERIPH_D
Definition pio.h:76
#define PIO_TYPE_PIO_PERIPH_A
Definition pio.h:56
#define PIO_TYPE_PIO_INPUT
Definition pio.h:64
#define PIO_TYPE_NOT_A_PIN
Definition pio.h:54
#define PIO_TYPE_PIO_PERIPH_C
Definition pio.h:60
#define PIO_TYPE_PIO_PERIPH_D
Definition pio.h:62
enum _pio_type pio_type_t
Pio hardware registers.