SAM4SD32 (SAM4S-EK2)
Loading...
Searching...
No Matches
Pio Struct Reference

Pio hardware registers. More...

#include <component_pio.h>

Data Fields

__IO uint32_t PIO_ABCDSR [2]
 (Pio Offset: 0x0070) Peripheral Select Register
__O uint32_t PIO_AIMDR
 (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register
__O uint32_t PIO_AIMER
 (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register
__I uint32_t PIO_AIMMR
 (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register
__O uint32_t PIO_CODR
 (Pio Offset: 0x0034) Clear Output Data Register
__I uint32_t PIO_ELSR
 (Pio Offset: 0x00C8) Edge/Level Status Register
__O uint32_t PIO_ESR
 (Pio Offset: 0x00C0) Edge Select Register
__O uint32_t PIO_FELLSR
 (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register
__I uint32_t PIO_FRLHSR
 (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register
__O uint32_t PIO_IDR
 (Pio Offset: 0x0044) Interrupt Disable Register
__O uint32_t PIO_IER
 (Pio Offset: 0x0040) Interrupt Enable Register
__O uint32_t PIO_IFDR
 (Pio Offset: 0x0024) Glitch Input Filter Disable Register
__O uint32_t PIO_IFER
 (Pio Offset: 0x0020) Glitch Input Filter Enable Register
__O uint32_t PIO_IFSCDR
 (Pio Offset: 0x0080) Input Filter Slow Clock Disable Register
__O uint32_t PIO_IFSCER
 (Pio Offset: 0x0084) Input Filter Slow Clock Enable Register
__I uint32_t PIO_IFSCSR
 (Pio Offset: 0x0088) Input Filter Slow Clock Status Register
__I uint32_t PIO_IFSR
 (Pio Offset: 0x0028) Glitch Input Filter Status Register
__I uint32_t PIO_IMR
 (Pio Offset: 0x0048) Interrupt Mask Register
__I uint32_t PIO_ISR
 (Pio Offset: 0x004C) Interrupt Status Register
__I uint32_t PIO_LOCKSR
 (Pio Offset: 0x00E0) Lock Status
__O uint32_t PIO_LSR
 (Pio Offset: 0x00C4) Level Select Register
__O uint32_t PIO_MDDR
 (Pio Offset: 0x0054) Multi-driver Disable Register
__O uint32_t PIO_MDER
 (Pio Offset: 0x0050) Multi-driver Enable Register
__I uint32_t PIO_MDSR
 (Pio Offset: 0x0058) Multi-driver Status Register
__O uint32_t PIO_ODR
 (Pio Offset: 0x0014) Output Disable Register
__IO uint32_t PIO_ODSR
 (Pio Offset: 0x0038) Output Data Status Register
__O uint32_t PIO_OER
 (Pio Offset: 0x0010) Output Enable Register
__I uint32_t PIO_OSR
 (Pio Offset: 0x0018) Output Status Register
__O uint32_t PIO_OWDR
 (Pio Offset: 0x00A4) Output Write Disable
__O uint32_t PIO_OWER
 (Pio Offset: 0x00A0) Output Write Enable
__I uint32_t PIO_OWSR
 (Pio Offset: 0x00A8) Output Write Status Register
__O uint32_t PIO_PCIDR
 (Pio Offset: 0x158) Parallel Capture Interrupt Disable Register
__O uint32_t PIO_PCIER
 (Pio Offset: 0x154) Parallel Capture Interrupt Enable Register
__I uint32_t PIO_PCIMR
 (Pio Offset: 0x15C) Parallel Capture Interrupt Mask Register
__I uint32_t PIO_PCISR
 (Pio Offset: 0x160) Parallel Capture Interrupt Status Register
__IO uint32_t PIO_PCMR
 (Pio Offset: 0x150) Parallel Capture Mode Register
__I uint32_t PIO_PCRHR
 (Pio Offset: 0x164) Parallel Capture Reception Holding Register
__O uint32_t PIO_PDR
 (Pio Offset: 0x0004) PIO Disable Register
__I uint32_t PIO_PDSR
 (Pio Offset: 0x003C) Pin Data Status Register
__O uint32_t PIO_PER
 (Pio Offset: 0x0000) PIO Enable Register
__O uint32_t PIO_PPDDR
 (Pio Offset: 0x0090) Pad Pull-down Disable Register
__O uint32_t PIO_PPDER
 (Pio Offset: 0x0094) Pad Pull-down Enable Register
__I uint32_t PIO_PPDSR
 (Pio Offset: 0x0098) Pad Pull-down Status Register
__I uint32_t PIO_PSR
 (Pio Offset: 0x0008) PIO Status Register
__O uint32_t PIO_PTCR
 (Pio Offset: 0x188) Transfer Control Register
__I uint32_t PIO_PTSR
 (Pio Offset: 0x18C) Transfer Status Register
__O uint32_t PIO_PUDR
 (Pio Offset: 0x0060) Pull-up Disable Register
__O uint32_t PIO_PUER
 (Pio Offset: 0x0064) Pull-up Enable Register
__I uint32_t PIO_PUSR
 (Pio Offset: 0x0068) Pad Pull-up Status Register
__IO uint32_t PIO_RCR
 (Pio Offset: 0x16C) Receive Counter Register
__O uint32_t PIO_REHLSR
 (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register
__IO uint32_t PIO_RNCR
 (Pio Offset: 0x17C) Receive Next Counter Register
__IO uint32_t PIO_RNPR
 (Pio Offset: 0x178) Receive Next Pointer Register
__IO uint32_t PIO_RPR
 (Pio Offset: 0x168) Receive Pointer Register
__IO uint32_t PIO_SCDR
 (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register
__IO uint32_t PIO_SCHMITT
 (Pio Offset: 0x0100) Schmitt Trigger Register
__O uint32_t PIO_SODR
 (Pio Offset: 0x0030) Set Output Data Register
__IO uint32_t PIO_WPMR
 (Pio Offset: 0x00E4) Write Protect Mode Register
__I uint32_t PIO_WPSR
 (Pio Offset: 0x00E8) Write Protect Status Register
__I uint32_t Reserved1 [1]
__I uint32_t Reserved10 [1]
__I uint32_t Reserved11 [1]
__I uint32_t Reserved12 [5]
__I uint32_t Reserved13 [19]
__I uint32_t Reserved14 [2]
__I uint32_t Reserved15 [2]
__I uint32_t Reserved2 [1]
__I uint32_t Reserved3 [1]
__I uint32_t Reserved4 [1]
__I uint32_t Reserved5 [1]
__I uint32_t Reserved6 [2]
__I uint32_t Reserved7 [1]
__I uint32_t Reserved8 [1]
__I uint32_t Reserved9 [1]

Detailed Description

Pio hardware registers.

Definition at line 46 of file component_pio.h.

Field Documentation

◆ PIO_ABCDSR

__IO uint32_t Pio::PIO_ABCDSR[2]

(Pio Offset: 0x0070) Peripheral Select Register

Definition at line 75 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), and pio_set_peripheral().

◆ PIO_AIMDR

__O uint32_t Pio::PIO_AIMDR

(Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register

Definition at line 90 of file component_pio.h.

Referenced by arch_ioport_set_port_sense_mode(), pio_configure_interrupt(), and pio_set_additional_interrupt_mode().

◆ PIO_AIMER

__O uint32_t Pio::PIO_AIMER

(Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register

Definition at line 89 of file component_pio.h.

Referenced by arch_ioport_set_port_sense_mode(), pio_configure_interrupt(), and pio_set_additional_interrupt_mode().

◆ PIO_AIMMR

__I uint32_t Pio::PIO_AIMMR

(Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register

Definition at line 91 of file component_pio.h.

◆ PIO_CODR

__O uint32_t Pio::PIO_CODR

(Pio Offset: 0x0034) Clear Output Data Register

Definition at line 60 of file component_pio.h.

Referenced by arch_ioport_set_pin_level(), arch_ioport_set_port_level(), arch_ioport_toggle_pin_level(), pio_clear(), pio_set_output(), pio_set_pin_group_low(), pio_set_pin_low(), pio_toggle_pin(), and pio_toggle_pin_group().

◆ PIO_ELSR

__I uint32_t Pio::PIO_ELSR

(Pio Offset: 0x00C8) Edge/Level Status Register

Definition at line 95 of file component_pio.h.

◆ PIO_ESR

__O uint32_t Pio::PIO_ESR

(Pio Offset: 0x00C0) Edge Select Register

Definition at line 93 of file component_pio.h.

Referenced by arch_ioport_set_port_sense_mode(), pio_configure_interrupt(), and pio_set_additional_interrupt_mode().

◆ PIO_FELLSR

__O uint32_t Pio::PIO_FELLSR

(Pio Offset: 0x00D0) Falling Edge/Low Level Select Register

Definition at line 97 of file component_pio.h.

Referenced by arch_ioport_set_port_sense_mode(), pio_configure_interrupt(), and pio_set_additional_interrupt_mode().

◆ PIO_FRLHSR

__I uint32_t Pio::PIO_FRLHSR

(Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register

Definition at line 99 of file component_pio.h.

◆ PIO_IDR

__O uint32_t Pio::PIO_IDR

(Pio Offset: 0x0044) Interrupt Disable Register

Definition at line 64 of file component_pio.h.

Referenced by pio_disable_interrupt(), pio_disable_pin_interrupt(), and pio_set_peripheral().

◆ PIO_IER

__O uint32_t Pio::PIO_IER

(Pio Offset: 0x0040) Interrupt Enable Register

Definition at line 63 of file component_pio.h.

Referenced by pio_enable_interrupt(), and pio_enable_pin_interrupt().

◆ PIO_IFDR

__O uint32_t Pio::PIO_IFDR

(Pio Offset: 0x0024) Glitch Input Filter Disable Register

Definition at line 56 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), and pio_set_input().

◆ PIO_IFER

__O uint32_t Pio::PIO_IFER

(Pio Offset: 0x0020) Glitch Input Filter Enable Register

Definition at line 55 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), and pio_set_input().

◆ PIO_IFSCDR

__O uint32_t Pio::PIO_IFSCDR

(Pio Offset: 0x0080) Input Filter Slow Clock Disable Register

Definition at line 77 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), and pio_set_input().

◆ PIO_IFSCER

__O uint32_t Pio::PIO_IFSCER

(Pio Offset: 0x0084) Input Filter Slow Clock Enable Register

Definition at line 78 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), pio_set_debounce_filter(), and pio_set_input().

◆ PIO_IFSCSR

__I uint32_t Pio::PIO_IFSCSR

(Pio Offset: 0x0088) Input Filter Slow Clock Status Register

Definition at line 79 of file component_pio.h.

◆ PIO_IFSR

__I uint32_t Pio::PIO_IFSR

(Pio Offset: 0x0028) Glitch Input Filter Status Register

Definition at line 57 of file component_pio.h.

◆ PIO_IMR

__I uint32_t Pio::PIO_IMR

(Pio Offset: 0x0048) Interrupt Mask Register

Definition at line 65 of file component_pio.h.

Referenced by pio_get_interrupt_mask().

◆ PIO_ISR

__I uint32_t Pio::PIO_ISR

(Pio Offset: 0x004C) Interrupt Status Register

Definition at line 66 of file component_pio.h.

Referenced by pio_get_interrupt_status().

◆ PIO_LOCKSR

__I uint32_t Pio::PIO_LOCKSR

(Pio Offset: 0x00E0) Lock Status

Definition at line 101 of file component_pio.h.

◆ PIO_LSR

__O uint32_t Pio::PIO_LSR

(Pio Offset: 0x00C4) Level Select Register

Definition at line 94 of file component_pio.h.

Referenced by arch_ioport_set_port_sense_mode(), pio_configure_interrupt(), and pio_set_additional_interrupt_mode().

◆ PIO_MDDR

__O uint32_t Pio::PIO_MDDR

(Pio Offset: 0x0054) Multi-driver Disable Register

Definition at line 68 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), pio_set_multi_driver(), and pio_set_output().

◆ PIO_MDER

__O uint32_t Pio::PIO_MDER

(Pio Offset: 0x0050) Multi-driver Enable Register

Definition at line 67 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), pio_set_multi_driver(), and pio_set_output().

◆ PIO_MDSR

__I uint32_t Pio::PIO_MDSR

(Pio Offset: 0x0058) Multi-driver Status Register

Definition at line 69 of file component_pio.h.

Referenced by pio_get_multi_driver_status().

◆ PIO_ODR

__O uint32_t Pio::PIO_ODR

(Pio Offset: 0x0014) Output Disable Register

Definition at line 52 of file component_pio.h.

Referenced by arch_ioport_set_pin_dir(), arch_ioport_set_port_dir(), and pio_set_input().

◆ PIO_ODSR

__IO uint32_t Pio::PIO_ODSR

(Pio Offset: 0x0038) Output Data Status Register

Definition at line 61 of file component_pio.h.

Referenced by arch_ioport_toggle_port_level(), pio_get(), pio_get_output_data_status(), pio_sync_output_write(), pio_toggle_pin(), and pio_toggle_pin_group().

◆ PIO_OER

__O uint32_t Pio::PIO_OER

(Pio Offset: 0x0010) Output Enable Register

Definition at line 51 of file component_pio.h.

Referenced by arch_ioport_set_pin_dir(), arch_ioport_set_port_dir(), and pio_set_output().

◆ PIO_OSR

__I uint32_t Pio::PIO_OSR

(Pio Offset: 0x0018) Output Status Register

Definition at line 53 of file component_pio.h.

◆ PIO_OWDR

__O uint32_t Pio::PIO_OWDR

(Pio Offset: 0x00A4) Output Write Disable

Definition at line 86 of file component_pio.h.

Referenced by pio_disable_output_write().

◆ PIO_OWER

__O uint32_t Pio::PIO_OWER

(Pio Offset: 0x00A0) Output Write Enable

Definition at line 85 of file component_pio.h.

Referenced by arch_ioport_set_pin_dir(), arch_ioport_set_port_dir(), and pio_enable_output_write().

◆ PIO_OWSR

__I uint32_t Pio::PIO_OWSR

(Pio Offset: 0x00A8) Output Write Status Register

Definition at line 87 of file component_pio.h.

Referenced by pio_get_output_write_status().

◆ PIO_PCIDR

__O uint32_t Pio::PIO_PCIDR

(Pio Offset: 0x158) Parallel Capture Interrupt Disable Register

Definition at line 109 of file component_pio.h.

Referenced by pio_capture_disable_interrupt().

◆ PIO_PCIER

__O uint32_t Pio::PIO_PCIER

(Pio Offset: 0x154) Parallel Capture Interrupt Enable Register

Definition at line 108 of file component_pio.h.

Referenced by pio_capture_enable_interrupt().

◆ PIO_PCIMR

__I uint32_t Pio::PIO_PCIMR

(Pio Offset: 0x15C) Parallel Capture Interrupt Mask Register

Definition at line 110 of file component_pio.h.

Referenced by pio_capture_get_interrupt_mask().

◆ PIO_PCISR

__I uint32_t Pio::PIO_PCISR

(Pio Offset: 0x160) Parallel Capture Interrupt Status Register

Definition at line 111 of file component_pio.h.

Referenced by pio_capture_enable_interrupt(), pio_capture_get_interrupt_status(), and pio_capture_read().

◆ PIO_PCMR

__IO uint32_t Pio::PIO_PCMR

(Pio Offset: 0x150) Parallel Capture Mode Register

Definition at line 107 of file component_pio.h.

Referenced by pio_capture_disable(), pio_capture_enable(), and pio_capture_set_mode().

◆ PIO_PCRHR

__I uint32_t Pio::PIO_PCRHR

(Pio Offset: 0x164) Parallel Capture Reception Holding Register

Definition at line 112 of file component_pio.h.

Referenced by pio_capture_read().

◆ PIO_PDR

__O uint32_t Pio::PIO_PDR

(Pio Offset: 0x0004) PIO Disable Register

Definition at line 48 of file component_pio.h.

Referenced by arch_ioport_disable_port(), and pio_set_peripheral().

◆ PIO_PDSR

__I uint32_t Pio::PIO_PDSR

(Pio Offset: 0x003C) Pin Data Status Register

Definition at line 62 of file component_pio.h.

Referenced by arch_ioport_get_pin_level(), arch_ioport_get_port_level(), arch_ioport_toggle_pin_level(), pio_get(), and pio_get_pin_value().

◆ PIO_PER

__O uint32_t Pio::PIO_PER

(Pio Offset: 0x0000) PIO Enable Register

Definition at line 47 of file component_pio.h.

Referenced by arch_ioport_enable_port(), pio_set_input(), and pio_set_output().

◆ PIO_PPDDR

__O uint32_t Pio::PIO_PPDDR

(Pio Offset: 0x0090) Pad Pull-down Disable Register

Definition at line 81 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), and pio_pull_down().

◆ PIO_PPDER

__O uint32_t Pio::PIO_PPDER

(Pio Offset: 0x0094) Pad Pull-down Enable Register

Definition at line 82 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), and pio_pull_down().

◆ PIO_PPDSR

__I uint32_t Pio::PIO_PPDSR

(Pio Offset: 0x0098) Pad Pull-down Status Register

Definition at line 83 of file component_pio.h.

◆ PIO_PSR

__I uint32_t Pio::PIO_PSR

(Pio Offset: 0x0008) PIO Status Register

Definition at line 49 of file component_pio.h.

◆ PIO_PTCR

__O uint32_t Pio::PIO_PTCR

(Pio Offset: 0x188) Transfer Control Register

Definition at line 119 of file component_pio.h.

◆ PIO_PTSR

__I uint32_t Pio::PIO_PTSR

(Pio Offset: 0x18C) Transfer Status Register

Definition at line 120 of file component_pio.h.

◆ PIO_PUDR

__O uint32_t Pio::PIO_PUDR

(Pio Offset: 0x0060) Pull-up Disable Register

Definition at line 71 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), and pio_pull_up().

◆ PIO_PUER

__O uint32_t Pio::PIO_PUER

(Pio Offset: 0x0064) Pull-up Enable Register

Definition at line 72 of file component_pio.h.

Referenced by arch_ioport_set_port_mode(), and pio_pull_up().

◆ PIO_PUSR

__I uint32_t Pio::PIO_PUSR

(Pio Offset: 0x0068) Pad Pull-up Status Register

Definition at line 73 of file component_pio.h.

◆ PIO_RCR

__IO uint32_t Pio::PIO_RCR

(Pio Offset: 0x16C) Receive Counter Register

Definition at line 114 of file component_pio.h.

◆ PIO_REHLSR

__O uint32_t Pio::PIO_REHLSR

(Pio Offset: 0x00D4) Rising Edge/ High Level Select Register

Definition at line 98 of file component_pio.h.

Referenced by arch_ioport_set_port_sense_mode(), pio_configure_interrupt(), and pio_set_additional_interrupt_mode().

◆ PIO_RNCR

__IO uint32_t Pio::PIO_RNCR

(Pio Offset: 0x17C) Receive Next Counter Register

Definition at line 117 of file component_pio.h.

◆ PIO_RNPR

__IO uint32_t Pio::PIO_RNPR

(Pio Offset: 0x178) Receive Next Pointer Register

Definition at line 116 of file component_pio.h.

◆ PIO_RPR

__IO uint32_t Pio::PIO_RPR

(Pio Offset: 0x168) Receive Pointer Register

Definition at line 113 of file component_pio.h.

◆ PIO_SCDR

__IO uint32_t Pio::PIO_SCDR

(Pio Offset: 0x008C) Slow Clock Divider Debouncing Register

Definition at line 80 of file component_pio.h.

Referenced by pio_set_debounce_filter().

◆ PIO_SCHMITT

__IO uint32_t Pio::PIO_SCHMITT

(Pio Offset: 0x0100) Schmitt Trigger Register

Definition at line 105 of file component_pio.h.

Referenced by pio_get_schmitt_trigger(), and pio_set_schmitt_trigger().

◆ PIO_SODR

__O uint32_t Pio::PIO_SODR

(Pio Offset: 0x0030) Set Output Data Register

Definition at line 59 of file component_pio.h.

Referenced by arch_ioport_set_pin_level(), arch_ioport_set_port_level(), arch_ioport_toggle_pin_level(), pio_set(), pio_set_output(), pio_set_pin_group_high(), pio_set_pin_high(), pio_toggle_pin(), and pio_toggle_pin_group().

◆ PIO_WPMR

__IO uint32_t Pio::PIO_WPMR

(Pio Offset: 0x00E4) Write Protect Mode Register

Definition at line 102 of file component_pio.h.

Referenced by pio_set_writeprotect().

◆ PIO_WPSR

__I uint32_t Pio::PIO_WPSR

(Pio Offset: 0x00E8) Write Protect Status Register

Definition at line 103 of file component_pio.h.

Referenced by pio_get_writeprotect_status().

◆ Reserved1

__I uint32_t Pio::Reserved1[1]

Definition at line 50 of file component_pio.h.

◆ Reserved10

__I uint32_t Pio::Reserved10[1]

Definition at line 96 of file component_pio.h.

◆ Reserved11

__I uint32_t Pio::Reserved11[1]

Definition at line 100 of file component_pio.h.

◆ Reserved12

__I uint32_t Pio::Reserved12[5]

Definition at line 104 of file component_pio.h.

◆ Reserved13

__I uint32_t Pio::Reserved13[19]

Definition at line 106 of file component_pio.h.

◆ Reserved14

__I uint32_t Pio::Reserved14[2]

Definition at line 115 of file component_pio.h.

◆ Reserved15

__I uint32_t Pio::Reserved15[2]

Definition at line 118 of file component_pio.h.

◆ Reserved2

__I uint32_t Pio::Reserved2[1]

Definition at line 54 of file component_pio.h.

◆ Reserved3

__I uint32_t Pio::Reserved3[1]

Definition at line 58 of file component_pio.h.

◆ Reserved4

__I uint32_t Pio::Reserved4[1]

Definition at line 70 of file component_pio.h.

◆ Reserved5

__I uint32_t Pio::Reserved5[1]

Definition at line 74 of file component_pio.h.

◆ Reserved6

__I uint32_t Pio::Reserved6[2]

Definition at line 76 of file component_pio.h.

◆ Reserved7

__I uint32_t Pio::Reserved7[1]

Definition at line 84 of file component_pio.h.

◆ Reserved8

__I uint32_t Pio::Reserved8[1]

Definition at line 88 of file component_pio.h.

◆ Reserved9

__I uint32_t Pio::Reserved9[1]

Definition at line 92 of file component_pio.h.