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SAM4SD32 (SAM4S-EK2)
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Twi hardware registers. More...
#include <component_twi.h>
Data Fields | |
| __I uint32_t | Reserved1 [3] |
| __I uint32_t | Reserved2 [50] |
| __O uint32_t | TWI_CR |
| (Twi Offset: 0x00) Control Register | |
| __IO uint32_t | TWI_CWGR |
| (Twi Offset: 0x10) Clock Waveform Generator Register | |
| __IO uint32_t | TWI_IADR |
| (Twi Offset: 0x0C) Internal Address Register | |
| __O uint32_t | TWI_IDR |
| (Twi Offset: 0x28) Interrupt Disable Register | |
| __O uint32_t | TWI_IER |
| (Twi Offset: 0x24) Interrupt Enable Register | |
| __I uint32_t | TWI_IMR |
| (Twi Offset: 0x2C) Interrupt Mask Register | |
| __IO uint32_t | TWI_MMR |
| (Twi Offset: 0x04) Master Mode Register | |
| __O uint32_t | TWI_PTCR |
| (Twi Offset: 0x120) Transfer Control Register | |
| __I uint32_t | TWI_PTSR |
| (Twi Offset: 0x124) Transfer Status Register | |
| __IO uint32_t | TWI_RCR |
| (Twi Offset: 0x104) Receive Counter Register | |
| __I uint32_t | TWI_RHR |
| (Twi Offset: 0x30) Receive Holding Register | |
| __IO uint32_t | TWI_RNCR |
| (Twi Offset: 0x114) Receive Next Counter Register | |
| __IO uint32_t | TWI_RNPR |
| (Twi Offset: 0x110) Receive Next Pointer Register | |
| __IO uint32_t | TWI_RPR |
| (Twi Offset: 0x100) Receive Pointer Register | |
| __IO uint32_t | TWI_SMR |
| (Twi Offset: 0x08) Slave Mode Register | |
| __I uint32_t | TWI_SR |
| (Twi Offset: 0x20) Status Register | |
| __IO uint32_t | TWI_TCR |
| (Twi Offset: 0x10C) Transmit Counter Register | |
| __O uint32_t | TWI_THR |
| (Twi Offset: 0x34) Transmit Holding Register | |
| __IO uint32_t | TWI_TNCR |
| (Twi Offset: 0x11C) Transmit Next Counter Register | |
| __IO uint32_t | TWI_TNPR |
| (Twi Offset: 0x118) Transmit Next Pointer Register | |
| __IO uint32_t | TWI_TPR |
| (Twi Offset: 0x108) Transmit Pointer Register | |
Twi hardware registers.
Definition at line 46 of file component_twi.h.
| __I uint32_t Twi::Reserved1[3] |
Definition at line 52 of file component_twi.h.
| __I uint32_t Twi::Reserved2[50] |
Definition at line 59 of file component_twi.h.
| __O uint32_t Twi::TWI_CR |
(Twi Offset: 0x00) Control Register
Definition at line 47 of file component_twi.h.
Referenced by twi_disable_master_mode(), twi_disable_slave_mode(), twi_enable_master_mode(), twi_enable_slave_mode(), twi_master_init(), twi_master_read(), twi_master_write(), and twi_reset().
| __IO uint32_t Twi::TWI_CWGR |
(Twi Offset: 0x10) Clock Waveform Generator Register
Definition at line 51 of file component_twi.h.
Referenced by twi_set_speed().
| __IO uint32_t Twi::TWI_IADR |
(Twi Offset: 0x0C) Internal Address Register
Definition at line 50 of file component_twi.h.
Referenced by twi_master_read(), and twi_master_write().
| __O uint32_t Twi::TWI_IDR |
(Twi Offset: 0x28) Interrupt Disable Register
Definition at line 55 of file component_twi.h.
Referenced by twi_disable_interrupt(), twi_master_init(), and twi_slave_init().
| __O uint32_t Twi::TWI_IER |
(Twi Offset: 0x24) Interrupt Enable Register
Definition at line 54 of file component_twi.h.
Referenced by twi_enable_interrupt().
| __I uint32_t Twi::TWI_IMR |
(Twi Offset: 0x2C) Interrupt Mask Register
Definition at line 56 of file component_twi.h.
Referenced by twi_get_interrupt_mask().
| __IO uint32_t Twi::TWI_MMR |
(Twi Offset: 0x04) Master Mode Register
Definition at line 48 of file component_twi.h.
Referenced by twi_master_read(), and twi_master_write().
| __O uint32_t Twi::TWI_PTCR |
(Twi Offset: 0x120) Transfer Control Register
Definition at line 68 of file component_twi.h.
| __I uint32_t Twi::TWI_PTSR |
(Twi Offset: 0x124) Transfer Status Register
Definition at line 69 of file component_twi.h.
| __IO uint32_t Twi::TWI_RCR |
(Twi Offset: 0x104) Receive Counter Register
Definition at line 61 of file component_twi.h.
| __I uint32_t Twi::TWI_RHR |
(Twi Offset: 0x30) Receive Holding Register
Definition at line 57 of file component_twi.h.
Referenced by twi_master_read(), twi_read_byte(), twi_reset(), and twi_slave_read().
| __IO uint32_t Twi::TWI_RNCR |
(Twi Offset: 0x114) Receive Next Counter Register
Definition at line 65 of file component_twi.h.
| __IO uint32_t Twi::TWI_RNPR |
(Twi Offset: 0x110) Receive Next Pointer Register
Definition at line 64 of file component_twi.h.
| __IO uint32_t Twi::TWI_RPR |
(Twi Offset: 0x100) Receive Pointer Register
Definition at line 60 of file component_twi.h.
| __IO uint32_t Twi::TWI_SMR |
(Twi Offset: 0x08) Slave Mode Register
Definition at line 49 of file component_twi.h.
Referenced by twi_set_slave_addr(), and twi_slave_init().
| __I uint32_t Twi::TWI_SR |
(Twi Offset: 0x20) Status Register
Definition at line 53 of file component_twi.h.
Referenced by twi_disable_interrupt(), twi_get_interrupt_status(), twi_master_init(), twi_master_read(), twi_master_write(), twi_slave_init(), twi_slave_read(), and twi_slave_write().
| __IO uint32_t Twi::TWI_TCR |
(Twi Offset: 0x10C) Transmit Counter Register
Definition at line 63 of file component_twi.h.
| __O uint32_t Twi::TWI_THR |
(Twi Offset: 0x34) Transmit Holding Register
Definition at line 58 of file component_twi.h.
Referenced by twi_master_write(), twi_slave_write(), and twi_write_byte().
| __IO uint32_t Twi::TWI_TNCR |
(Twi Offset: 0x11C) Transmit Next Counter Register
Definition at line 67 of file component_twi.h.
| __IO uint32_t Twi::TWI_TNPR |
(Twi Offset: 0x118) Transmit Next Pointer Register
Definition at line 66 of file component_twi.h.
| __IO uint32_t Twi::TWI_TPR |
(Twi Offset: 0x108) Transmit Pointer Register
Definition at line 62 of file component_twi.h.