pwm.h

Go to the documentation of this file.

/*
 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
 */
 
#ifndef PWM_H_INCLUDED
#define PWM_H_INCLUDED
 
#include "compiler.h"


#ifdef __cplusplus
extern "C" {
#endif
 
#define PWM_INVALID_ARGUMENT  0xFFFF

typedef enum _pwm_ch_t {
    PWM_CHANNEL_0 = 0,
    PWM_CHANNEL_1 = 1,
    PWM_CHANNEL_2 = 2,
    PWM_CHANNEL_3 = 3,
#if (SAM3XA)
    PWM_CHANNEL_4 = 4,
    PWM_CHANNEL_5 = 5,
    PWM_CHANNEL_6 = 6,
    PWM_CHANNEL_7 = 7
#endif /* (SAM3XA) */
} pwm_ch_t;

typedef enum {
    PWM_ALIGN_LEFT = (0 << 8),   /* The period is left aligned. */
    PWM_ALIGN_CENTER = (1 << 8)  /* The period is center aligned. */
} pwm_align_t;

typedef enum {
    PWM_LOW = LOW,     /* Low level */
    PWM_HIGH = HIGH,  /* High level */
#if (SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70)
    PWM_HIGHZ,  /* High Impedance */
#endif
} pwm_level_t;

typedef struct {
    uint32_t ul_clka;
    uint32_t ul_clkb;
    uint32_t ul_mck;
} pwm_clock_t;
 
#if (SAM3U || SAM3S || SAM3XA || SAM4S || SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70)
typedef enum {
    PWM_STEPPER_MOTOR_CH_0_1 = 0,  /* Channel 0 and 1 */
    PWM_STEPPER_MOTOR_CH_2_3 = 1,  /* Channel 2 and 3 */
#if (SAM3XA)
    PWM_STEPPER_MOTOR_CH_4_5 = 2,  /* Channel 4 and 5 */
    PWM_STEPPER_MOTOR_CH_6_7 = 3   /* Channel 6 and 7 */
#endif /* (SAM3XA) */
} pwm_stepper_motor_pair_t;

typedef enum {
    PWM_SYNC_UPDATE_MODE_0 = PWM_SCM_UPDM_MODE0,
    PWM_SYNC_UPDATE_MODE_1 = PWM_SCM_UPDM_MODE1,
    PWM_SYNC_UPDATE_MODE_2 = PWM_SCM_UPDM_MODE2
} pwm_sync_update_mode_t;

typedef enum {
    PWM_EVENT_PERIOD_END = (0 << 10),      /* The channel counter event occurs at the end of the PWM period. */
    PWM_EVENT_PERIOD_HALF_END = (1 << 10)  /* The channel counter event occurs at the half of the PWM period. */
} pwm_counter_event_t;

typedef enum {
#if (SAM3U)
    PWM_FAULT_MAINOSC = (1 << 0),
    PWM_FAULT_PWMFI2 = (1 << 1),
    PWM_FAULT_PWMFI0 = (1 << 2),
    PWM_FAULT_PWMFI1 = (1 << 3),
#elif (SAM3S || SAM4S )
    PWM_FAULT_PWMFI0 = (1 << 0),
    PWM_FAULT_MAINOSC = (1 << 1),
    PWM_FAULT_ADC = (1 << 2),
    PWM_FAULT_ACC = (1 << 3),
    PWM_FAULT_TIMER_0 = (1 << 4),
    PWM_FAULT_TIMER_1 = (1 << 5),
#elif (SAM4E )
    PWM_FAULT_MAINOSC = (1 << 0),
    PWM_FAULT_ADC = (1 << 1),
    PWM_FAULT_PWMFI0 = (1 << 2),
    PWM_FAULT_PWMFI1 = (1 << 3),
    PWM_FAULT_PWMFI2 = (1 << 4),
    PWM_FAULT_PWMFI3 = (1 << 5),
    PWM_FAULT_PWMFI4 = (1 << 6),
    PWM_FAULT_PWMFI5 = (1 << 7),
#elif (SAMV70 || SAMV71 || SAME70 || SAMS70)
    PWM_FAULT_PWMC0_PWMFI0 = (1 << 0),
    PWM_FAULT_PWMC0_PWMFI1 = (1 << 1),
    PWM_FAULT_PWMC0_PWMFI2 = (1 << 2),
    PWM_FAULT_PWMC1_PWMFI0 = (1 << 0),
    PWM_FAULT_PWMC1_PWMFI1 = (1 << 1),
    PWM_FAULT_PWMC1_PWMFI2 = (1 << 2),
    PWM_FAULT_MAINOSC = (1 << 3),
    PWM_FAULT_AFEC0 = (1 << 4),
    PWM_FAULT_AFEC1 = (1 << 5),
    PWM_FAULT_ACC = (1 << 6),
    PWM_FAULT_TIMER_0 = (1 << 7),
    PWM_FAULT_TIMER_1 = (1 << 7),
#elif (SAM3XA)
    PWM_FAULT_PWMFI0 = (1 << 0),
    PWM_FAULT_PWMFI1 = (1 << 1),
    PWM_FAULT_PWMFI2 = (1 << 2),
    PWM_FAULT_MAINOSC = (1 << 3),
    PWM_FAULT_ADC = (1 << 4),
    PWM_FAULT_TIMER_0 = (1 << 5),
#endif
} pwm_fault_id_t;

typedef enum {
    PWM_GROUP_CLOCK = (1 << 0),
    PWM_GROUP_DISABLE = (1 << 1),
    PWM_GROUP_MODE = (1 << 2),
    PWM_GROUP_PERIOD = (1 << 3),
    PWM_GROUP_DEAD_TIME = (1 << 4),
    PWM_GROUP_FAULT = (1 << 5)
} pwm_protect_reg_group_t;

typedef enum {
    PWM_CMP_MATCH = 8,   /* Comparison unit match */
    PWM_CMP_UPDATE = 16  /* Comparison unit update */
} pwm_cmp_interrupt_t;

typedef enum {
    PWM_CMP_UNIT_0 = 0,
    PWM_CMP_UNIT_1 = 1,
    PWM_CMP_UNIT_2 = 2,
    PWM_CMP_UNIT_3 = 3,
    PWM_CMP_UNIT_4 = 4,
    PWM_CMP_UNIT_5 = 5,
    PWM_CMP_UNIT_6 = 6,
    PWM_CMP_UNIT_7 = 7
} pmc_cmp_unit_t;

typedef enum {
    PWM_PDC_UPDATE_PERIOD_ELAPSED = (0 << 20),  /* PDC transfer request is set as soon as the update period elapses. */
    PWM_PDC_COMPARISON_MATCH = (1 << 20)  /* PDC transfer request is set as soon as the selected comparison matches. */
} pwm_pdc_request_mode_t;

typedef enum {
    PWM_PDC_TX_END = (1 << 1),   /* PDC Tx end */
    PWM_PDC_TX_EMPTY = (1 << 2)  /* PDC Tx buffer empty */
} pwm_pdc_interrupt_t;

typedef enum {
    PWM_SYNC_WRITE_READY = (1 << 0),  /* Write Ready for Synchronous Channels Update */
    PWM_SYNC_UNDERRUN = (1 << 3)      /* Synchronous Channels Update Underrun Error */
} pwm_sync_interrupt_t;
 
#if (SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70)
typedef enum {
    PWM_SPREAD_SPECTRUM_MODE_TRIANGULAR = 0,
    PWM_SPREAD_SPECTRUM_MODE_RANDOM
} pwm_spread_spectrum_mode_t;
#if (SAMV70 || SAMV71 || SAME70 || SAMS70)
typedef enum {
    PWM_LEADING_EDGE1_MODE_LINC = PWM_LEBR1_PWMLFEN,
    PWM_LEADING_EDGE1_MODE_LDEC = PWM_LEBR1_PWMLREN,
    PWM_LEADING_EDGE1_MODE_HINC = PWM_LEBR1_PWMHFEN,
    PWM_LEADING_EDGE1_MODE_HDEC = PWM_LEBR1_PWMHREN,
    PWM_LEADING_EDGE2_MODE_LINC = PWM_LEBR2_PWMLFEN,
    PWM_LEADING_EDGE2_MODE_LDEC = PWM_LEBR2_PWMLREN,
    PWM_LEADING_EDGE2_MODE_HINC = PWM_LEBR2_PWMHFEN,
    PWM_LEADING_EDGE2_MODE_HDEC = PWM_LEBR2_PWMHREN,
} pwm_leading_edge_blanking_mode_t;
#endif
#endif

typedef struct {
    bool b_override_pwmh;
    bool b_override_pwml;
    pwm_level_t override_level_pwmh;
    pwm_level_t override_level_pwml;
} pwm_output_t;

typedef struct {
    uint32_t unit;
    bool b_enable;
    uint32_t ul_value;
    bool b_is_decrementing;
    uint32_t ul_trigger;
    uint32_t ul_period;
    uint32_t ul_update_period;
    bool b_pulse_on_line_0;
    bool b_pulse_on_line_1;
} pwm_cmp_t;

typedef struct {
    pwm_fault_id_t fault_id;
    pwm_level_t polarity;
    bool b_clear;
    bool b_filtered;
} pwm_fault_t;

typedef struct {
    uint32_t ul_hw_status;
    uint32_t ul_sw_status;
    uint32_t ul_offset;
} pwm_protect_t;
#endif /* (SAM3U || SAM3S || SAM3XA || SAM4S || SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70) */

typedef struct {
    uint32_t channel;
    uint32_t ul_prescaler;
    pwm_align_t alignment;
    pwm_level_t polarity;
    uint32_t ul_duty;
    uint32_t ul_period;
 
#if (SAM3U || SAM3S || SAM3XA || SAM4S || SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70)
    pwm_counter_event_t counter_event;
    bool b_deadtime_generator;
    bool b_pwmh_output_inverted;
    bool b_pwml_output_inverted;
    uint16_t us_deadtime_pwmh;
    uint16_t us_deadtime_pwml;
    pwm_output_t output_selection;
    bool b_sync_ch;
    pwm_fault_id_t fault_id;
    pwm_level_t ul_fault_output_pwmh;
    pwm_level_t ul_fault_output_pwml;
#endif /* (SAM3U || SAM3S || SAM3XA || SAM4S || SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70) */
#if SAM4E
    uint32_t ul_spread;
    pwm_spread_spectrum_mode_t spread_spectrum_mode;
#elif (SAMV70 || SAMV71 || SAME70 || SAMS70)
    uint32_t ul_spread;
    pwm_spread_spectrum_mode_t spread_spectrum_mode;
    uint32_t ul_leading_edge_delay;
    pwm_leading_edge_blanking_mode_t leading_edge_blanking_mode;
    uint32_t ul_ppm_mode;
#endif
} pwm_channel_t;
 
 
uint32_t pwm_init(Pwm *p_pwm, pwm_clock_t *clock_config);
uint32_t pwm_channel_init(Pwm *p_pwm, pwm_channel_t *p_channel);
uint32_t pwm_channel_update_period(Pwm *p_pwm, pwm_channel_t *p_channel,
        uint32_t ul_period);
uint32_t pwm_channel_update_duty(Pwm *p_pwm, pwm_channel_t *p_channel,
        uint32_t ul_duty);
uint32_t pwm_channel_get_counter(Pwm *p_pwm, pwm_channel_t *p_channel);
void pwm_channel_enable(Pwm *p_pwm, uint32_t ul_channel);
void pwm_channel_disable(Pwm *p_pwm, uint32_t ul_channel);
uint32_t pwm_channel_get_status(Pwm *p_pwm);
uint32_t pwm_channel_get_interrupt_status(Pwm *p_pwm);
uint32_t pwm_channel_get_interrupt_mask(Pwm *p_pwm);
void pwm_channel_enable_interrupt(Pwm *p_pwm, uint32_t ul_event,
        uint32_t ul_fault);
void pwm_channel_disable_interrupt(Pwm *p_pwm, uint32_t ul_event,
        uint32_t ul_fault);
 
#if (SAM3U || SAM3S || SAM3XA || SAM4S || SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70)
void pwm_channel_update_output(Pwm *p_pwm, pwm_channel_t *p_channel,
        pwm_output_t *p_output, bool b_sync);
void pwm_channel_update_dead_time(Pwm *p_pwm, pwm_channel_t *p_channel,
        uint16_t us_deadtime_pwmh, uint16_t us_deadtime_pwml);
 
uint32_t pwm_fault_init(Pwm *p_pwm, pwm_fault_t *p_fault);
uint32_t pwm_fault_get_status(Pwm *p_pwm);
pwm_level_t pwm_fault_get_input_level(Pwm *p_pwm, pwm_fault_id_t id);
void pwm_fault_clear_status(Pwm *p_pwm, pwm_fault_id_t id);
 
uint32_t pwm_cmp_init(Pwm *p_pwm, pwm_cmp_t *p_cmp);
uint32_t pwm_cmp_change_setting(Pwm *p_pwm, pwm_cmp_t *p_cmp);
uint32_t pwm_cmp_get_period_counter(Pwm *p_pwm, uint32_t ul_cmp_unit);
uint32_t pwm_cmp_get_update_counter(Pwm *p_pwm, uint32_t ul_cmp_unit);
void pwm_cmp_enable_interrupt(Pwm *p_pwm, uint32_t ul_sources,
        pwm_cmp_interrupt_t type);
void pwm_cmp_disable_interrupt(Pwm *p_pwm, uint32_t ul_sources,
        pwm_cmp_interrupt_t type);
#if !(SAMV70 || SAMV71 || SAME70 || SAMS70)
void pwm_pdc_set_request_mode(Pwm *p_pwm, pwm_pdc_request_mode_t request_mode,
        uint32_t ul_cmp_unit);
 
void pwm_pdc_enable_interrupt(Pwm *p_pwm, uint32_t ul_sources);
void pwm_pdc_disable_interrupt(Pwm *p_pwm, uint32_t ul_sources);
#endif
uint32_t pwm_sync_init(Pwm *p_pwm, pwm_sync_update_mode_t mode,
        uint32_t ul_update_period);
void pwm_sync_unlock_update(Pwm *p_pwm);
void pwm_sync_change_period(Pwm *p_pwm, uint32_t ul_update_period);
uint32_t pwm_sync_get_period_counter(Pwm * p_pwm);
void pwm_sync_enable_interrupt(Pwm *p_pwm, uint32_t ul_sources);
void pwm_sync_disable_interrupt(Pwm *p_pwm, uint32_t ul_sources);
 
void pwm_enable_protect(Pwm *p_pwm, uint32_t ul_group, bool b_sw);
void pwm_disable_protect(Pwm *p_pwm, uint32_t ul_group);
bool pwm_get_protect_status(Pwm *p_pwm, pwm_protect_t * p_protect);
 
uint32_t pwm_get_interrupt_status(Pwm *p_pwm);
uint32_t pwm_get_interrupt_mask(Pwm *p_pwm);
#endif /* (SAM3U || SAM3S || SAM3XA || SAM4S || SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70) */
 
#if (SAM3S || SAM3XA || SAM4S || SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70)
void pwm_stepper_motor_init(Pwm *p_pwm, pwm_stepper_motor_pair_t pair,
        bool b_enable_gray, bool b_down);
#endif /* (SAM3S || SAM3XA || SAM4S || SAM4E || SAMV70 || SAMV71 || SAME70 || SAMS70) */
 
#if SAM4E
void pwm_channel_update_spread(Pwm *p_pwm, pwm_channel_t *p_channel,
        uint32_t ul_spread);
void pwm_channel_update_polarity_mode(Pwm *p_pwm, pwm_channel_t *p_channel,
        bool polarity_inversion_flag, pwm_level_t polarity_value);
#elif (SAMV70 || SAMV71 || SAME70 || SAMS70)
void pwm_channel_update_spread(Pwm *p_pwm, pwm_channel_t *p_channel,
        uint32_t ul_spread);
void pwm_channel_update_leading_edge(Pwm *p_pwm, pwm_channel_t *p_channel,
        uint32_t ul_leading_edge_delay,
        pwm_leading_edge_blanking_mode_t leading_edge_blanking_mode);
#endif
 
#if (SAMV70 || SAMV71 || SAME70 || SAMS70)
void pwm_set_dma_duty(Pwm *p_pwm, uint32_t ul_dma_duty_value);
void pwm_set_ext_trigger_mode(Pwm *p_pwm, pwm_channel_t *p_channel, uint32_t ul_mode);
#endif


#ifdef __cplusplus
}
#endif


 
#endif /* PWM_H_INCLUDED */