#include <component_pwm.h>

Data Fields
PwmCh_num	PWM_CH_NUM [PWMCH_NUM_NUMBER]
	(Pwm Offset: 0x200) ch_num = 0 .
__IO uint32_t	PWM_CLK
	(Pwm Offset: 0x00) PWM Clock Register
PwmCmp	PWM_CMP [PWMCMP_NUMBER]
	(Pwm Offset: 0x130) 0 .
__O uint32_t	PWM_DIS
	(Pwm Offset: 0x08) PWM Disable Register
__IO uint32_t	PWM_ELMR [2]
	(Pwm Offset: 0x7C) PWM Event Line 0 Mode Register
__O uint32_t	PWM_ENA
	(Pwm Offset: 0x04) PWM Enable Register
__O uint32_t	PWM_FCR
	(Pwm Offset: 0x64) PWM Fault Clear Register
__IO uint32_t	PWM_FMR
	(Pwm Offset: 0x5C) PWM Fault Mode Register
__IO uint32_t	PWM_FPE
	(Pwm Offset: 0x6C) PWM Fault Protection Enable Register
__IO uint32_t	PWM_FPV
	(Pwm Offset: 0x68) PWM Fault Protection Value Register
__I uint32_t	PWM_FSR
	(Pwm Offset: 0x60) PWM Fault Status Register
__O uint32_t	PWM_IDR1
	(Pwm Offset: 0x14) PWM Interrupt Disable Register 1
__O uint32_t	PWM_IDR2
	(Pwm Offset: 0x38) PWM Interrupt Disable Register 2
__O uint32_t	PWM_IER1
	(Pwm Offset: 0x10) PWM Interrupt Enable Register 1
__O uint32_t	PWM_IER2
	(Pwm Offset: 0x34) PWM Interrupt Enable Register 2
__I uint32_t	PWM_IMR1
	(Pwm Offset: 0x18) PWM Interrupt Mask Register 1
__I uint32_t	PWM_IMR2
	(Pwm Offset: 0x3C) PWM Interrupt Mask Register 2
__I uint32_t	PWM_ISR1
	(Pwm Offset: 0x1C) PWM Interrupt Status Register 1
__I uint32_t	PWM_ISR2
	(Pwm Offset: 0x40) PWM Interrupt Status Register 2
__IO uint32_t	PWM_OOV
	(Pwm Offset: 0x44) PWM Output Override Value Register
__IO uint32_t	PWM_OS
	(Pwm Offset: 0x48) PWM Output Selection Register
__O uint32_t	PWM_OSC
	(Pwm Offset: 0x50) PWM Output Selection Clear Register
__O uint32_t	PWM_OSCUPD
	(Pwm Offset: 0x58) PWM Output Selection Clear Update Register
__O uint32_t	PWM_OSS
	(Pwm Offset: 0x4C) PWM Output Selection Set Register
__O uint32_t	PWM_OSSUPD
	(Pwm Offset: 0x54) PWM Output Selection Set Update Register
__O uint32_t	PWM_PTCR
	(Pwm Offset: 0x120) Transfer Control Register
__I uint32_t	PWM_PTSR
	(Pwm Offset: 0x124) Transfer Status Register
__IO uint32_t	PWM_SCM
	(Pwm Offset: 0x20) PWM Sync Channels Mode Register
__IO uint32_t	PWM_SCUC
	(Pwm Offset: 0x28) PWM Sync Channels Update Control Register
__IO uint32_t	PWM_SCUP
	(Pwm Offset: 0x2C) PWM Sync Channels Update Period Register
__O uint32_t	PWM_SCUPUPD
	(Pwm Offset: 0x30) PWM Sync Channels Update Period Update Register
__IO uint32_t	PWM_SMMR
	(Pwm Offset: 0xB0) PWM Stepper Motor Mode Register
__I uint32_t	PWM_SR
	(Pwm Offset: 0x0C) PWM Status Register
__IO uint32_t	PWM_TCR
	(Pwm Offset: 0x10C) Transmit Counter Register
__IO uint32_t	PWM_TNCR
	(Pwm Offset: 0x11C) Transmit Next Counter Register
__IO uint32_t	PWM_TNPR
	(Pwm Offset: 0x118) Transmit Next Pointer Register
__IO uint32_t	PWM_TPR
	(Pwm Offset: 0x108) Transmit Pointer Register
__O uint32_t	PWM_WPCR
	(Pwm Offset: 0xE4) PWM Write Protection Control Register
__I uint32_t	PWM_WPSR
	(Pwm Offset: 0xE8) PWM Write Protection Status Register
__I uint32_t	Reserved1 [1]
__I uint32_t	Reserved2 [3]
__I uint32_t	Reserved3 [11]
__I uint32_t	Reserved4 [12]
__I uint32_t	Reserved5 [7]
__I uint32_t	Reserved6 [2]
__I uint32_t	Reserved7 [2]
__I uint32_t	Reserved8 [20]

Detailed Description

Definition at line 66 of file component_pwm.h.

Field Documentation

◆ PWM_CH_NUM

PwmCh_num Pwm::PWM_CH_NUM[PWMCH_NUM_NUMBER]

(Pwm Offset: 0x200) ch_num = 0 .

. 3

Definition at line 113 of file component_pwm.h.

Referenced by pwm_channel_get_counter(), pwm_channel_init(), pwm_channel_update_dead_time(), pwm_channel_update_duty(), and pwm_channel_update_period().

◆ PWM_CLK

__IO uint32_t Pwm::PWM_CLK

(Pwm Offset: 0x00) PWM Clock Register

Definition at line 67 of file component_pwm.h.

Referenced by pwm_init().

◆ PWM_CMP

PwmCmp Pwm::PWM_CMP[PWMCMP_NUMBER]

(Pwm Offset: 0x130) 0 .

. 7

Definition at line 111 of file component_pwm.h.

Referenced by pwm_cmp_change_setting(), pwm_cmp_get_period_counter(), pwm_cmp_get_update_counter(), and pwm_cmp_init().

◆ PWM_DIS

__O uint32_t Pwm::PWM_DIS

(Pwm Offset: 0x08) PWM Disable Register

Definition at line 69 of file component_pwm.h.

Referenced by pwm_channel_disable().

◆ PWM_ELMR

__IO uint32_t Pwm::PWM_ELMR[2]

(Pwm Offset: 0x7C) PWM Event Line 0 Mode Register

Definition at line 96 of file component_pwm.h.

Referenced by pwm_cmp_change_setting(), and pwm_cmp_init().

◆ PWM_ENA

__O uint32_t Pwm::PWM_ENA

(Pwm Offset: 0x04) PWM Enable Register

Definition at line 68 of file component_pwm.h.

Referenced by pwm_channel_enable().

◆ PWM_FCR

__O uint32_t Pwm::PWM_FCR

(Pwm Offset: 0x64) PWM Fault Clear Register

Definition at line 92 of file component_pwm.h.

Referenced by pwm_fault_clear_status().

◆ PWM_FMR

__IO uint32_t Pwm::PWM_FMR

(Pwm Offset: 0x5C) PWM Fault Mode Register

Definition at line 90 of file component_pwm.h.

Referenced by pwm_fault_init().

◆ PWM_FPE

__IO uint32_t Pwm::PWM_FPE

(Pwm Offset: 0x6C) PWM Fault Protection Enable Register

Definition at line 94 of file component_pwm.h.

Referenced by pwm_channel_init().

◆ PWM_FPV

__IO uint32_t Pwm::PWM_FPV

(Pwm Offset: 0x68) PWM Fault Protection Value Register

Definition at line 93 of file component_pwm.h.

Referenced by pwm_channel_init().

◆ PWM_FSR

__I uint32_t Pwm::PWM_FSR

(Pwm Offset: 0x60) PWM Fault Status Register

Definition at line 91 of file component_pwm.h.

Referenced by pwm_fault_get_input_level(), and pwm_fault_get_status().

◆ PWM_IDR1

__O uint32_t Pwm::PWM_IDR1

(Pwm Offset: 0x14) PWM Interrupt Disable Register 1

Definition at line 72 of file component_pwm.h.

Referenced by pwm_channel_disable_interrupt().

◆ PWM_IDR2

__O uint32_t Pwm::PWM_IDR2

(Pwm Offset: 0x38) PWM Interrupt Disable Register 2

Definition at line 81 of file component_pwm.h.

Referenced by pwm_cmp_disable_interrupt(), pwm_pdc_disable_interrupt(), and pwm_sync_disable_interrupt().

◆ PWM_IER1

__O uint32_t Pwm::PWM_IER1

(Pwm Offset: 0x10) PWM Interrupt Enable Register 1

Definition at line 71 of file component_pwm.h.

Referenced by pwm_channel_enable_interrupt().

◆ PWM_IER2

__O uint32_t Pwm::PWM_IER2

(Pwm Offset: 0x34) PWM Interrupt Enable Register 2

Definition at line 80 of file component_pwm.h.

Referenced by pwm_cmp_enable_interrupt(), pwm_pdc_enable_interrupt(), and pwm_sync_enable_interrupt().

◆ PWM_IMR1

__I uint32_t Pwm::PWM_IMR1

(Pwm Offset: 0x18) PWM Interrupt Mask Register 1

Definition at line 73 of file component_pwm.h.

Referenced by pwm_channel_get_interrupt_mask().

◆ PWM_IMR2

__I uint32_t Pwm::PWM_IMR2

(Pwm Offset: 0x3C) PWM Interrupt Mask Register 2

Definition at line 82 of file component_pwm.h.

Referenced by pwm_get_interrupt_mask().

◆ PWM_ISR1

__I uint32_t Pwm::PWM_ISR1

(Pwm Offset: 0x1C) PWM Interrupt Status Register 1

Definition at line 74 of file component_pwm.h.

Referenced by pwm_channel_get_interrupt_status().

◆ PWM_ISR2

__I uint32_t Pwm::PWM_ISR2

(Pwm Offset: 0x40) PWM Interrupt Status Register 2

Definition at line 83 of file component_pwm.h.

Referenced by pwm_get_interrupt_status().

◆ PWM_OOV

__IO uint32_t Pwm::PWM_OOV

(Pwm Offset: 0x44) PWM Output Override Value Register

Definition at line 84 of file component_pwm.h.

Referenced by pwm_channel_init(), and pwm_channel_update_output().

◆ PWM_OS

__IO uint32_t Pwm::PWM_OS

(Pwm Offset: 0x48) PWM Output Selection Register

Definition at line 85 of file component_pwm.h.

Referenced by pwm_channel_init().

◆ PWM_OSC

__O uint32_t Pwm::PWM_OSC

(Pwm Offset: 0x50) PWM Output Selection Clear Register

Definition at line 87 of file component_pwm.h.

Referenced by pwm_channel_update_output().

◆ PWM_OSCUPD

__O uint32_t Pwm::PWM_OSCUPD

(Pwm Offset: 0x58) PWM Output Selection Clear Update Register

Definition at line 89 of file component_pwm.h.

Referenced by pwm_channel_update_output().

◆ PWM_OSS

__O uint32_t Pwm::PWM_OSS

(Pwm Offset: 0x4C) PWM Output Selection Set Register

Definition at line 86 of file component_pwm.h.

Referenced by pwm_channel_update_output().

◆ PWM_OSSUPD

__O uint32_t Pwm::PWM_OSSUPD

(Pwm Offset: 0x54) PWM Output Selection Set Update Register

Definition at line 88 of file component_pwm.h.

Referenced by pwm_channel_update_output().

◆ PWM_PTCR

__O uint32_t Pwm::PWM_PTCR

(Pwm Offset: 0x120) Transfer Control Register

Definition at line 108 of file component_pwm.h.

◆ PWM_PTSR

__I uint32_t Pwm::PWM_PTSR

(Pwm Offset: 0x124) Transfer Status Register

Definition at line 109 of file component_pwm.h.

◆ PWM_SCM

__IO uint32_t Pwm::PWM_SCM

(Pwm Offset: 0x20) PWM Sync Channels Mode Register

Definition at line 75 of file component_pwm.h.

Referenced by pwm_channel_init(), pwm_pdc_set_request_mode(), and pwm_sync_init().

◆ PWM_SCUC

__IO uint32_t Pwm::PWM_SCUC

(Pwm Offset: 0x28) PWM Sync Channels Update Control Register

Definition at line 77 of file component_pwm.h.

Referenced by pwm_sync_unlock_update().

◆ PWM_SCUP

__IO uint32_t Pwm::PWM_SCUP

(Pwm Offset: 0x2C) PWM Sync Channels Update Period Register

Definition at line 78 of file component_pwm.h.

Referenced by pwm_sync_get_period_counter(), and pwm_sync_init().

◆ PWM_SCUPUPD

__O uint32_t Pwm::PWM_SCUPUPD

(Pwm Offset: 0x30) PWM Sync Channels Update Period Update Register

Definition at line 79 of file component_pwm.h.

Referenced by pwm_sync_change_period().

◆ PWM_SMMR

__IO uint32_t Pwm::PWM_SMMR

(Pwm Offset: 0xB0) PWM Stepper Motor Mode Register

Definition at line 98 of file component_pwm.h.

Referenced by pwm_stepper_motor_init().

◆ PWM_SR

__I uint32_t Pwm::PWM_SR

(Pwm Offset: 0x0C) PWM Status Register

Definition at line 70 of file component_pwm.h.

Referenced by pwm_channel_get_status().

◆ PWM_TCR

__IO uint32_t Pwm::PWM_TCR

(Pwm Offset: 0x10C) Transmit Counter Register

Definition at line 104 of file component_pwm.h.

◆ PWM_TNCR

__IO uint32_t Pwm::PWM_TNCR

(Pwm Offset: 0x11C) Transmit Next Counter Register

Definition at line 107 of file component_pwm.h.

◆ PWM_TNPR

__IO uint32_t Pwm::PWM_TNPR

(Pwm Offset: 0x118) Transmit Next Pointer Register

Definition at line 106 of file component_pwm.h.

◆ PWM_TPR

__IO uint32_t Pwm::PWM_TPR

(Pwm Offset: 0x108) Transmit Pointer Register

Definition at line 103 of file component_pwm.h.

◆ PWM_WPCR

__O uint32_t Pwm::PWM_WPCR

(Pwm Offset: 0xE4) PWM Write Protection Control Register

Definition at line 100 of file component_pwm.h.

Referenced by pwm_disable_protect(), and pwm_enable_protect().

◆ PWM_WPSR

__I uint32_t Pwm::PWM_WPSR

(Pwm Offset: 0xE8) PWM Write Protection Status Register

Definition at line 101 of file component_pwm.h.

Referenced by pwm_get_protect_status().

◆ Reserved1

__I uint32_t Pwm::Reserved1[1]

Definition at line 76 of file component_pwm.h.

◆ Reserved2

__I uint32_t Pwm::Reserved2[3]

Definition at line 95 of file component_pwm.h.

◆ Reserved3

__I uint32_t Pwm::Reserved3[11]

Definition at line 97 of file component_pwm.h.

◆ Reserved4

__I uint32_t Pwm::Reserved4[12]

Definition at line 99 of file component_pwm.h.

◆ Reserved5

__I uint32_t Pwm::Reserved5[7]

Definition at line 102 of file component_pwm.h.

◆ Reserved6

__I uint32_t Pwm::Reserved6[2]

Definition at line 105 of file component_pwm.h.

◆ Reserved7

__I uint32_t Pwm::Reserved7[2]

Definition at line 110 of file component_pwm.h.

◆ Reserved8

__I uint32_t Pwm::Reserved8[20]

Definition at line 112 of file component_pwm.h.

Data Fields

Detailed Description

Field Documentation

◆ PWM_CH_NUM

◆ PWM_CLK

◆ PWM_CMP

◆ PWM_DIS

◆ PWM_ELMR

◆ PWM_ENA

◆ PWM_FCR

◆ PWM_FMR

◆ PWM_FPE

◆ PWM_FPV

◆ PWM_FSR

◆ PWM_IDR1

◆ PWM_IDR2

◆ PWM_IER1

◆ PWM_IER2

◆ PWM_IMR1

◆ PWM_IMR2

◆ PWM_ISR1

◆ PWM_ISR2

◆ PWM_OOV

◆ PWM_OS

◆ PWM_OSC

◆ PWM_OSCUPD

◆ PWM_OSS

◆ PWM_OSSUPD

◆ PWM_PTCR

◆ PWM_PTSR

◆ PWM_SCM

◆ PWM_SCUC

◆ PWM_SCUP

◆ PWM_SCUPUPD

◆ PWM_SMMR

◆ PWM_SR

◆ PWM_TCR

◆ PWM_TNCR

◆ PWM_TNPR

◆ PWM_TPR

◆ PWM_WPCR

◆ PWM_WPSR

◆ Reserved1

◆ Reserved2

◆ Reserved3

◆ Reserved4

◆ Reserved5

◆ Reserved6

◆ Reserved7

◆ Reserved8