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SAM4SD32 (SAM4S-EK2)
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TcChannel hardware registers. More...
#include <component_tc.h>
Data Fields | |
| __I uint32_t | Reserved1 [1] |
| __I uint32_t | Reserved2 [4] |
| __O uint32_t | TC_CCR |
| (TcChannel Offset: 0x0) Channel Control Register | |
| __IO uint32_t | TC_CMR |
| (TcChannel Offset: 0x4) Channel Mode Register | |
| __I uint32_t | TC_CV |
| (TcChannel Offset: 0x10) Counter Value | |
| __O uint32_t | TC_IDR |
| (TcChannel Offset: 0x28) Interrupt Disable Register | |
| __O uint32_t | TC_IER |
| (TcChannel Offset: 0x24) Interrupt Enable Register | |
| __I uint32_t | TC_IMR |
| (TcChannel Offset: 0x2C) Interrupt Mask Register | |
| __IO uint32_t | TC_RA |
| (TcChannel Offset: 0x14) Register A | |
| __IO uint32_t | TC_RB |
| (TcChannel Offset: 0x18) Register B | |
| __IO uint32_t | TC_RC |
| (TcChannel Offset: 0x1C) Register C | |
| __IO uint32_t | TC_SMMR |
| (TcChannel Offset: 0x8) Stepper Motor Mode Register | |
| __I uint32_t | TC_SR |
| (TcChannel Offset: 0x20) Status Register | |
TcChannel hardware registers.
Definition at line 46 of file component_tc.h.
| __I uint32_t TcChannel::Reserved1[1] |
Definition at line 50 of file component_tc.h.
| __I uint32_t TcChannel::Reserved2[4] |
Definition at line 59 of file component_tc.h.
| __O uint32_t TcChannel::TC_CCR |
(TcChannel Offset: 0x0) Channel Control Register
Definition at line 47 of file component_tc.h.
Referenced by tc_init(), tc_start(), and tc_stop().
| __IO uint32_t TcChannel::TC_CMR |
(TcChannel Offset: 0x4) Channel Mode Register
Definition at line 48 of file component_tc.h.
Referenced by tc_init().
| __I uint32_t TcChannel::TC_CV |
(TcChannel Offset: 0x10) Counter Value
Definition at line 51 of file component_tc.h.
Referenced by tc_read_cv().
| __O uint32_t TcChannel::TC_IDR |
(TcChannel Offset: 0x28) Interrupt Disable Register
Definition at line 57 of file component_tc.h.
Referenced by tc_disable_interrupt(), and tc_init().
| __O uint32_t TcChannel::TC_IER |
(TcChannel Offset: 0x24) Interrupt Enable Register
Definition at line 56 of file component_tc.h.
Referenced by tc_enable_interrupt().
| __I uint32_t TcChannel::TC_IMR |
(TcChannel Offset: 0x2C) Interrupt Mask Register
Definition at line 58 of file component_tc.h.
Referenced by tc_get_interrupt_mask().
| __IO uint32_t TcChannel::TC_RA |
(TcChannel Offset: 0x14) Register A
Definition at line 52 of file component_tc.h.
Referenced by tc_read_ra(), and tc_write_ra().
| __IO uint32_t TcChannel::TC_RB |
(TcChannel Offset: 0x18) Register B
Definition at line 53 of file component_tc.h.
Referenced by tc_read_rb(), and tc_write_rb().
| __IO uint32_t TcChannel::TC_RC |
(TcChannel Offset: 0x1C) Register C
Definition at line 54 of file component_tc.h.
Referenced by tc_read_rc(), and tc_write_rc().
| __IO uint32_t TcChannel::TC_SMMR |
(TcChannel Offset: 0x8) Stepper Motor Mode Register
Definition at line 49 of file component_tc.h.
Referenced by tc_init_2bit_gray().
| __I uint32_t TcChannel::TC_SR |
(TcChannel Offset: 0x20) Status Register
Definition at line 55 of file component_tc.h.
Referenced by tc_get_status(), and tc_init().