SAM4SD32-SAM4S-EK2-IMT-Docs/html/tc_8h_source.html

/*

 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>

 */


#ifndef TC_H_INCLUDED

#define TC_H_INCLUDED


#include <compiler.h>


#ifdef __cplusplus

extern "C" {

#endif


void tc_init(Tc *p_tc, uint32_t ul_Channel, uint32_t ul_Mode);

void tc_sync_trigger(Tc *p_tc);

void tc_set_block_mode(Tc *p_tc, uint32_t ul_blockmode);


#if (!SAM3U) || defined(__DOXYGEN__)

uint32_t tc_init_2bit_gray(Tc *p_tc, uint32_t ul_channel,

        uint32_t ul_steppermode);

#endif /* (!SAM3U) || defined(__DOXYGEN__) */


void tc_start(Tc *p_tc, uint32_t ul_channel);

void tc_stop(Tc *p_tc, uint32_t ul_channel);


uint32_t tc_read_cv(Tc *p_tc, uint32_t ul_channel);

uint32_t tc_read_ra(Tc *p_tc, uint32_t ul_channel);

uint32_t tc_read_rb(Tc *p_tc, uint32_t ul_channel);

uint32_t tc_read_rc(Tc *p_tc, uint32_t ul_channel);


void tc_write_ra(Tc *p_tc, uint32_t ul_channel,

        uint32_t ul_value);

void tc_write_rb(Tc *p_tc, uint32_t ul_channel,

        uint32_t ul_value);

void tc_write_rc(Tc *p_tc, uint32_t ul_channel,

        uint32_t ul_value);


uint32_t tc_find_mck_divisor(uint32_t ul_freq, uint32_t ul_mck,

        uint32_t *p_uldiv, uint32_t *ul_tcclks, uint32_t ul_boardmck);

void tc_enable_interrupt(Tc *p_tc, uint32_t ul_channel,

        uint32_t ul_sources);

void tc_disable_interrupt(Tc *p_tc, uint32_t ul_channel,

        uint32_t ul_sources);

uint32_t tc_get_interrupt_mask(Tc *p_tc, uint32_t ul_channel);

uint32_t tc_get_status(Tc *p_tc, uint32_t ul_channel);

#if (!SAM4L && !SAMG) || defined(__DOXYGEN__)

void tc_enable_qdec_interrupt(Tc *p_tc, uint32_t ul_sources);

void tc_disable_qdec_interrupt(Tc *p_tc, uint32_t ul_sources);

uint32_t tc_get_qdec_interrupt_mask(Tc *p_tc);

uint32_t tc_get_qdec_interrupt_status(Tc *p_tc);

#endif /* (!SAM4L && !SAMG) || defined(__DOXYGEN__) */


#if (!SAM3U)

void tc_set_writeprotect(Tc *p_tc, uint32_t ul_enable);

#endif /* (!SAM3U) */


#if SAM4L || defined(__DOXYGEN__)

uint32_t tc_get_feature(Tc *p_tc);

uint32_t tc_get_version(Tc *p_tc);

#endif /* SAM4L || defined(__DOXYGEN__) */


#ifdef __cplusplus

}

#endif


#endif /* TC_H_INCLUDED */

tc_get_qdec_interrupt_status
uint32_t tc_get_qdec_interrupt_status(Tc *p_tc)
Get current TC QDEC interrupt status.
Definition tc.c:683

tc_get_interrupt_mask
uint32_t tc_get_interrupt_mask(Tc *p_tc, uint32_t ul_channel)
Read the TC interrupt mask for the specified channel.
Definition tc.c:423

tc_enable_interrupt
void tc_enable_interrupt(Tc *p_tc, uint32_t ul_channel, uint32_t ul_sources)
Enable the TC interrupts on the specified channel.
Definition tc.c:362

tc_read_rb
uint32_t tc_read_rb(Tc *p_tc, uint32_t ul_channel)
Read TC Register B (RB) on the specified channel.
Definition tc.c:247

tc_write_rb
void tc_write_rb(Tc *p_tc, uint32_t ul_channel, uint32_t ul_value)
Write to TC Register B (RB) on the specified channel.
Definition tc.c:306

tc_read_rc
uint32_t tc_read_rc(Tc *p_tc, uint32_t ul_channel)
Read TC Register C (RC) on the specified channel.
Definition tc.c:267

tc_init
void tc_init(Tc *p_tc, uint32_t ul_Channel, uint32_t ul_Mode)
Configure TC for timer, waveform generation, or capture.
Definition tc.c:70

tc_set_block_mode
void tc_set_block_mode(Tc *p_tc, uint32_t ul_blockmode)
Configure the TC Block mode.
Definition tc.c:123

tc_write_rc
void tc_write_rc(Tc *p_tc, uint32_t ul_channel, uint32_t ul_value)
Write to TC Register C (RC) on the selected channel.
Definition tc.c:326

tc_find_mck_divisor
uint32_t tc_find_mck_divisor(uint32_t ul_freq, uint32_t ul_mck, uint32_t *p_uldiv, uint32_t *ul_tcclks, uint32_t ul_boardmck)
Find the best PBA/MCK divisor.
Definition tc.c:553

tc_get_qdec_interrupt_mask
uint32_t tc_get_qdec_interrupt_mask(Tc *p_tc)
Read TC QDEC interrupt mask.
Definition tc.c:665

tc_start
void tc_start(Tc *p_tc, uint32_t ul_channel)
Start the TC clock on the specified channel.
Definition tc.c:169

tc_disable_interrupt
void tc_disable_interrupt(Tc *p_tc, uint32_t ul_channel, uint32_t ul_sources)
Disable TC interrupts on the specified channel.
Definition tc.c:400

tc_disable_qdec_interrupt
void tc_disable_qdec_interrupt(Tc *p_tc, uint32_t ul_sources)
Disable TC QDEC interrupts.
Definition tc.c:646

tc_write_ra
void tc_write_ra(Tc *p_tc, uint32_t ul_channel, uint32_t ul_value)
Write to TC Register A (RA) on the specified channel.
Definition tc.c:286

tc_enable_qdec_interrupt
void tc_enable_qdec_interrupt(Tc *p_tc, uint32_t ul_sources)
Enable TC QDEC interrupts.
Definition tc.c:617

tc_sync_trigger
void tc_sync_trigger(Tc *p_tc)
Asserts a SYNC signal to generate a software trigger on all channels.
Definition tc.c:103

tc_get_feature
uint32_t tc_get_feature(Tc *p_tc)
Indicate TC features.
Definition tc.c:731

tc_set_writeprotect
void tc_set_writeprotect(Tc *p_tc, uint32_t ul_enable)
Enable or disable write protection of TC registers.
Definition tc.c:704

tc_stop
void tc_stop(Tc *p_tc, uint32_t ul_channel)
Stop the TC clock on the specified channel.
Definition tc.c:187

tc_get_version
uint32_t tc_get_version(Tc *p_tc)
Indicate TC version.
Definition tc.c:749

tc_init_2bit_gray
uint32_t tc_init_2bit_gray(Tc *p_tc, uint32_t ul_channel, uint32_t ul_steppermode)
Configure TC for 2-bit Gray Counter for Stepper Motor.
Definition tc.c:147

tc_get_status
uint32_t tc_get_status(Tc *p_tc, uint32_t ul_channel)
Get the current status for the specified TC channel.
Definition tc.c:445

tc_read_ra
uint32_t tc_read_ra(Tc *p_tc, uint32_t ul_channel)
Read TC Register A (RA) on the specified channel.
Definition tc.c:227

tc_read_cv
uint32_t tc_read_cv(Tc *p_tc, uint32_t ul_channel)
Read the counter value on the specified channel.
Definition tc.c:207

Tc
Definition component_tc.h:63