Serial Peripheral Interface (SPI)

See Quickstart guide for SAM SPI driver. More...

Topics
	Legacy SPI group alias

Macros
#define	SPI_WPMR_WPKEY_PASSWD   SPI_WPMR_WPKEY((uint32_t) 0x535049)

Functions
int16_t	spi_calc_baudrate_div (const uint32_t baudrate, uint32_t mck)
	Calculate the baudrate divider.
void	spi_configure_cs_behavior (Spi *p_spi, uint32_t ul_pcs_ch, uint32_t ul_cs_behavior)
	Configure CS behavior for SPI transfer (spi_cs_behavior_t).
void	spi_disable_clock (Spi *p_spi)
	Disable SPI clock.
void	spi_enable_clock (Spi *p_spi)
	Enable SPI clock.
uint32_t	spi_get_writeprotect_status (Spi *p_spi)
	Indicate write protect status.
spi_status_t	spi_read (Spi *p_spi, uint16_t *us_data, uint8_t *p_pcs)
	Read the received data and it's peripheral chip select value.
int16_t	spi_set_baudrate_div (Spi *p_spi, uint32_t ul_pcs_ch, uint8_t uc_baudrate_divider)
	Set Serial Clock Baud Rate divider value (SCBR).
void	spi_set_bits_per_transfer (Spi *p_spi, uint32_t ul_pcs_ch, uint32_t ul_bits)
	Set number of bits per transfer.
void	spi_set_clock_phase (Spi *p_spi, uint32_t ul_pcs_ch, uint32_t ul_phase)
	Set Data Capture Phase.
void	spi_set_clock_polarity (Spi *p_spi, uint32_t ul_pcs_ch, uint32_t ul_polarity)
	Set clock default state.
void	spi_set_delay_between_chip_select (Spi *p_spi, uint32_t ul_delay)
	Set delay between chip selects (in number of MCK clocks).
void	spi_set_peripheral_chip_select_value (Spi *p_spi, uint32_t ul_value)
	Set Peripheral Chip Select (PCS) value.
void	spi_set_transfer_delay (Spi *p_spi, uint32_t ul_pcs_ch, uint8_t uc_dlybs, uint8_t uc_dlybct)
	Configure timing for SPI transfer.
void	spi_set_writeprotect (Spi *p_spi, uint32_t ul_enable)
	Enable or disable write protection of SPI registers.
spi_status_t	spi_write (Spi *p_spi, uint16_t us_data, uint8_t uc_pcs, uint8_t uc_last)
	Write the transmitted data with specified peripheral chip select value.

Detailed Description

See Quickstart guide for SAM SPI driver.

The SPI circuit is a synchronous serial data link that provides communication with external devices in Master or Slave mode. Connection to Peripheral DMA Controller channel capabilities optimizes data transfers.

Macro Definition Documentation

SPI_WPMR_WPKEY_PASSWD

#define SPI_WPMR_WPKEY_PASSWD   SPI_WPMR_WPKEY((uint32_t) 0x535049)

Definition at line 52 of file spi.c.

Referenced by spi_set_writeprotect().

Function Documentation

spi_calc_baudrate_div()

int16_t spi_calc_baudrate_div	(	const uint32_t	baudrate,
		uint32_t	mck )

Calculate the baudrate divider.

Parameters

baudrate	Baudrate value.
mck	SPI module input clock frequency (MCK clock, Hz).

Returns

Divider or error code.

Return values

>	0 Success.
<	0 Error.

Definition at line 362 of file spi.c.

{
    int baud_div = div_ceil(mck, baudrate);
 
    /* The value of baud_div is from 1 to 255 in the SCBR field. */
    if (baud_div <= 0 || baud_div > 255) {
        return -1;
    }
 
    return baud_div;
}

spi_configure_cs_behavior()

void spi_configure_cs_behavior	(	Spi *	p_spi,
		uint32_t	ul_pcs_ch,
		uint32_t	ul_cs_behavior )

Configure CS behavior for SPI transfer (spi_cs_behavior_t).

Parameters

p_spi	Pointer to an SPI instance.
ul_pcs_ch	Peripheral Chip Select channel (0~3).
ul_cs_behavior	Behavior of the Chip Select after transfer.

Definition at line 323 of file spi.c.

{
    if (ul_cs_behavior == SPI_CS_RISE_FORCED) {
        p_spi->SPI_CSR[ul_pcs_ch] &= (~SPI_CSR_CSAAT);
        p_spi->SPI_CSR[ul_pcs_ch] |= SPI_CSR_CSNAAT;
    } else if (ul_cs_behavior == SPI_CS_RISE_NO_TX) {
        p_spi->SPI_CSR[ul_pcs_ch] &= (~SPI_CSR_CSAAT);
        p_spi->SPI_CSR[ul_pcs_ch] &= (~SPI_CSR_CSNAAT);
    } else if (ul_cs_behavior == SPI_CS_KEEP_LOW) {
        p_spi->SPI_CSR[ul_pcs_ch] |= SPI_CSR_CSAAT;
    }
}

References SPI_CS_KEEP_LOW, SPI_CS_RISE_FORCED, SPI_CS_RISE_NO_TX, Spi::SPI_CSR, SPI_CSR_CSAAT, and SPI_CSR_CSNAAT.

spi_disable_clock()

void spi_disable_clock

(

Spi *

p_spi

)

Disable SPI clock.

Parameters

p_spi

Pointer to an SPI instance.

Definition at line 123 of file spi.c.

{
#if (SAM4S || SAM3S || SAM3N || SAM3U || SAM4E || SAM4N || SAMG51|| SAMG53|| SAMG54)
    UNUSED(p_spi);
    sysclk_disable_peripheral_clock(ID_SPI);
#elif (SAM3XA || SAM4C || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)
    if (p_spi == SPI0) {
        sysclk_disable_peripheral_clock(ID_SPI0);
    }
    #ifdef SPI1
    else if (p_spi == SPI1) {
        sysclk_disable_peripheral_clock(ID_SPI1);
    }
    #endif
#elif (SAMG55)
    if (p_spi == SPI0) {
        sysclk_disable_peripheral_clock(ID_FLEXCOM0);
    }
    #ifdef SPI1
    else if (p_spi == SPI1) {
        sysclk_disable_peripheral_clock(ID_FLEXCOM1);
    }
    #endif
    #ifdef SPI2
        else if (p_spi == SPI2) {
            sysclk_disable_peripheral_clock(ID_FLEXCOM2);
        }
    #endif
    #ifdef SPI3
        else if (p_spi == SPI3) {
            sysclk_disable_peripheral_clock(ID_FLEXCOM3);
        }
    #endif
    #ifdef SPI4
        else if (p_spi == SPI4) {
            sysclk_disable_peripheral_clock(ID_FLEXCOM4);
        }
    #endif
    #ifdef SPI5
        else if (p_spi == SPI5) {
            sysclk_disable_peripheral_clock(ID_FLEXCOM5);
        }
    #endif
    #ifdef SPI6
        else if (p_spi == SPI6) {
            sysclk_disable_peripheral_clock(ID_FLEXCOM6);
        }
    #endif
    #ifdef SPI7
        else if (p_spi == SPI7) {
            sysclk_disable_peripheral_clock(ID_FLEXCOM7);
        }
    #endif
#elif SAM4L
    sysclk_disable_peripheral_clock(p_spi);
#endif
}

References ID_SPI.

spi_enable_clock()

void spi_enable_clock

(

Spi *

p_spi

)

Enable SPI clock.

Parameters

p_spi

Pointer to an SPI instance.

Definition at line 60 of file spi.c.

{
#if (SAM4S || SAM3S || SAM3N || SAM3U || SAM4E || SAM4N || SAMG51|| SAMG53|| SAMG54)
    UNUSED(p_spi);
    sysclk_enable_peripheral_clock(ID_SPI);
#elif (SAM3XA || SAM4C || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70)
    if (p_spi == SPI0) {
        sysclk_enable_peripheral_clock(ID_SPI0);
    }
    #ifdef SPI1
    else if (p_spi == SPI1) {
        sysclk_enable_peripheral_clock(ID_SPI1);
    }
    #endif
#elif (SAMG55)
    if (p_spi == SPI0) {
        sysclk_enable_peripheral_clock(ID_FLEXCOM0);
    }
    #ifdef SPI1
    else if (p_spi == SPI1) {
        sysclk_enable_peripheral_clock(ID_FLEXCOM1);
    }
    #endif
    #ifdef SPI2
    else if (p_spi == SPI2) {
        sysclk_enable_peripheral_clock(ID_FLEXCOM2);
    }
    #endif
    #ifdef SPI3
    else if (p_spi == SPI3) {
        sysclk_enable_peripheral_clock(ID_FLEXCOM3);
    }
    #endif
    #ifdef SPI4
    else if (p_spi == SPI4) {
        sysclk_enable_peripheral_clock(ID_FLEXCOM4);
    }
    #endif
    #ifdef SPI5
    else if (p_spi == SPI5) {
        sysclk_enable_peripheral_clock(ID_FLEXCOM5);
    }
    #endif
    #ifdef SPI6
    else if (p_spi == SPI6) {
        sysclk_enable_peripheral_clock(ID_FLEXCOM6);
    }
    #endif
    #ifdef SPI7
    else if (p_spi == SPI7) {
        sysclk_enable_peripheral_clock(ID_FLEXCOM7);
    }
    #endif
#elif SAM4L
    sysclk_enable_peripheral_clock(p_spi);
#endif
}

References ID_SPI.

spi_get_writeprotect_status()

uint32_t spi_get_writeprotect_status

(

Spi *

p_spi

)

Indicate write protect status.

Parameters

p_spi

Pointer to an SPI instance.

Returns

SPI_WPSR value.

Definition at line 444 of file spi.c.

{
    return p_spi->SPI_WPSR;
}

References Spi::SPI_WPSR.

spi_read()

spi_status_t spi_read	(	Spi *	p_spi,
		uint16_t *	us_data,
		uint8_t *	p_pcs )

Read the received data and it's peripheral chip select value.

While SPI works in fixed peripheral select mode, the peripheral chip select value is meaningless.

Parameters

p_spi	Pointer to an SPI instance.
us_data	Pointer to the location where to store the received data word.
p_pcs	Pointer to fill Peripheral Chip Select Value.

Return values

SPI_OK	on Success.
SPI_ERROR_TIMEOUT	on Time-out.

Definition at line 224 of file spi.c.

{
    uint32_t timeout = SPI_TIMEOUT;
    static uint32_t reg_value;
 
    while (!(p_spi->SPI_SR & SPI_SR_RDRF)) {
        if (!timeout--) {
            return SPI_ERROR_TIMEOUT;
        }
    }
 
    reg_value = p_spi->SPI_RDR;
    if (spi_get_peripheral_select_mode(p_spi)) {
        *p_pcs = (uint8_t) ((reg_value & SPI_RDR_PCS_Msk) >> SPI_RDR_PCS_Pos);
    }
    *us_data = (uint16_t) (reg_value & SPI_RDR_RD_Msk);
 
    return SPI_OK;
}

References SPI_ERROR_TIMEOUT, spi_get_peripheral_select_mode(), SPI_OK, Spi::SPI_RDR, SPI_RDR_PCS_Msk, SPI_RDR_PCS_Pos, SPI_RDR_RD_Msk, Spi::SPI_SR, SPI_SR_RDRF, and SPI_TIMEOUT.

spi_set_baudrate_div()

int16_t spi_set_baudrate_div	(	Spi *	p_spi,
		uint32_t	ul_pcs_ch,
		uint8_t	uc_baudrate_divider )

Set Serial Clock Baud Rate divider value (SCBR).

Parameters

p_spi	Pointer to an SPI instance.
ul_pcs_ch	Peripheral Chip Select channel (0~3).
uc_baudrate_divider	Baudrate divider from MCK.

Returns

Return values

0	Success.
-1	Error.

Definition at line 385 of file spi.c.

{
    /* Programming the SCBR field to 0 is forbidden */
    if (!uc_baudrate_divider){
        return -1;
    }
    p_spi->SPI_CSR[ul_pcs_ch] &= (~SPI_CSR_SCBR_Msk);
    p_spi->SPI_CSR[ul_pcs_ch] |= SPI_CSR_SCBR(uc_baudrate_divider);
    return 0;
}

References Spi::SPI_CSR, SPI_CSR_SCBR, and SPI_CSR_SCBR_Msk.

spi_set_bits_per_transfer()

void spi_set_bits_per_transfer	(	Spi *	p_spi,
		uint32_t	ul_pcs_ch,
		uint32_t	ul_bits )

Set number of bits per transfer.

Parameters

p_spi	Pointer to an SPI instance.
ul_pcs_ch	Peripheral Chip Select channel (0~3).
ul_bits	Number of bits (8~16), use the pattern defined in the device header file.

Definition at line 345 of file spi.c.

{
    p_spi->SPI_CSR[ul_pcs_ch] &= (~SPI_CSR_BITS_Msk);
    p_spi->SPI_CSR[ul_pcs_ch] |= ul_bits;
}

References Spi::SPI_CSR, and SPI_CSR_BITS_Msk.

spi_set_clock_phase()

void spi_set_clock_phase	(	Spi *	p_spi,
		uint32_t	ul_pcs_ch,
		uint32_t	ul_phase )

Set Data Capture Phase.

Parameters

p_spi	Pointer to an SPI instance.
ul_pcs_ch	Peripheral Chip Select channel (0~3).
ul_phase	Data capture on the rising/falling edge of clock.

Definition at line 307 of file spi.c.

{
    if (ul_phase) {
        p_spi->SPI_CSR[ul_pcs_ch] |= SPI_CSR_NCPHA;
    } else {
        p_spi->SPI_CSR[ul_pcs_ch] &= (~SPI_CSR_NCPHA);
    }
}

References Spi::SPI_CSR, and SPI_CSR_NCPHA.

spi_set_clock_polarity()

void spi_set_clock_polarity	(	Spi *	p_spi,
		uint32_t	ul_pcs_ch,
		uint32_t	ul_polarity )

Set clock default state.

Parameters

p_spi	Pointer to an SPI instance.
ul_pcs_ch	Peripheral Chip Select channel (0~3).
ul_polarity	Default clock state is logical one(high)/zero(low).

Definition at line 290 of file spi.c.

{
    if (ul_polarity) {
        p_spi->SPI_CSR[ul_pcs_ch] |= SPI_CSR_CPOL;
    } else {
        p_spi->SPI_CSR[ul_pcs_ch] &= (~SPI_CSR_CPOL);
    }
}

References Spi::SPI_CSR, and SPI_CSR_CPOL.

spi_set_delay_between_chip_select()

void spi_set_delay_between_chip_select	(	Spi *	p_spi,
		uint32_t	ul_delay )

Set delay between chip selects (in number of MCK clocks).

If DLYBCS <= 6, 6 MCK clocks will be inserted by default.

Parameters

p_spi	Pointer to an SPI instance.
ul_delay	Delay between chip selects (in number of MCK clocks).

Definition at line 206 of file spi.c.

{
    p_spi->SPI_MR &= (~SPI_MR_DLYBCS_Msk);
    p_spi->SPI_MR |= SPI_MR_DLYBCS(ul_delay);
}

References Spi::SPI_MR, SPI_MR_DLYBCS, and SPI_MR_DLYBCS_Msk.

spi_set_peripheral_chip_select_value()

void spi_set_peripheral_chip_select_value	(	Spi *	p_spi,
		uint32_t	ul_value )

Set Peripheral Chip Select (PCS) value.

Parameters

p_spi	Pointer to an SPI instance.
ul_value	Peripheral Chip Select value. If PCS decode mode is not used, use spi_get_pcs to build the value to use. On reset the decode mode is not enabled. The decode mode can be enabled/disabled by follow functions: spi_enable_peripheral_select_decode, spi_disable_peripheral_select_decode.

Definition at line 193 of file spi.c.

{
    p_spi->SPI_MR &= (~SPI_MR_PCS_Msk);
    p_spi->SPI_MR |= SPI_MR_PCS(ul_value);
}

References Spi::SPI_MR, SPI_MR_PCS, and SPI_MR_PCS_Msk.

spi_set_transfer_delay()

void spi_set_transfer_delay	(	Spi *	p_spi,
		uint32_t	ul_pcs_ch,
		uint8_t	uc_dlybs,
		uint8_t	uc_dlybct )

Configure timing for SPI transfer.

Parameters

p_spi	Pointer to an SPI instance.
ul_pcs_ch	Peripheral Chip Select channel (0~3).
uc_dlybs	Delay before SPCK (in number of MCK clocks).
uc_dlybct	Delay between consecutive transfers (in number of MCK clocks).

Definition at line 405 of file spi.c.

{
    p_spi->SPI_CSR[ul_pcs_ch] &= ~(SPI_CSR_DLYBS_Msk | SPI_CSR_DLYBCT_Msk);
    p_spi->SPI_CSR[ul_pcs_ch] |= SPI_CSR_DLYBS(uc_dlybs)
            | SPI_CSR_DLYBCT(uc_dlybct);
}

References Spi::SPI_CSR, SPI_CSR_DLYBCT, SPI_CSR_DLYBCT_Msk, SPI_CSR_DLYBS, and SPI_CSR_DLYBS_Msk.

spi_set_writeprotect()

void spi_set_writeprotect	(	Spi *	p_spi,
		uint32_t	ul_enable )

Enable or disable write protection of SPI registers.

Parameters

p_spi	Pointer to an SPI instance.
ul_enable	1 to enable, 0 to disable.

Definition at line 420 of file spi.c.

{
#if SAM4L
    if (ul_enable) {
        p_spi->SPI_WPCR = SPI_WPCR_SPIWPKEY_VALUE | SPI_WPCR_SPIWPEN;
    } else {
        p_spi->SPI_WPCR = SPI_WPCR_SPIWPKEY_VALUE;
    }
#else
    if (ul_enable) {
        p_spi->SPI_WPMR = SPI_WPMR_WPKEY_PASSWD | SPI_WPMR_WPEN;
    } else {
        p_spi->SPI_WPMR = SPI_WPMR_WPKEY_PASSWD;
    }
#endif
}

References Spi::SPI_WPMR, SPI_WPMR_WPEN, and SPI_WPMR_WPKEY_PASSWD.

spi_write()

spi_status_t spi_write	(	Spi *	p_spi,
		uint16_t	us_data,
		uint8_t	uc_pcs,
		uint8_t	uc_last )

Write the transmitted data with specified peripheral chip select value.

Parameters

p_spi	Pointer to an SPI instance.
us_data	The data to transmit.
uc_pcs	Peripheral Chip Select Value while SPI works in peripheral select mode, otherwise it's meaningless.
uc_last	Indicate whether this data is the last one while SPI is working in variable peripheral select mode.

Return values

SPI_OK	on Success.
SPI_ERROR_TIMEOUT	on Time-out.

Definition at line 257 of file spi.c.

{
    uint32_t timeout = SPI_TIMEOUT;
    uint32_t value;
 
    while (!(p_spi->SPI_SR & SPI_SR_TDRE)) {
        if (!timeout--) {
            return SPI_ERROR_TIMEOUT;
        }
    }
 
    if (spi_get_peripheral_select_mode(p_spi)) {
        value = SPI_TDR_TD(us_data) | SPI_TDR_PCS(uc_pcs);
        if (uc_last) {
            value |= SPI_TDR_LASTXFER;
        }
    } else {
        value = SPI_TDR_TD(us_data);
    }
 
    p_spi->SPI_TDR = value;
 
    return SPI_OK;
}

References SPI_ERROR_TIMEOUT, spi_get_peripheral_select_mode(), SPI_OK, Spi::SPI_SR, SPI_SR_TDRE, Spi::SPI_TDR, SPI_TDR_LASTXFER, SPI_TDR_PCS, SPI_TDR_TD, and SPI_TIMEOUT.