component_tc.h File Reference

Copyright (c) 2012-2018 Microchip Technology Inc. More...

Go to the source code of this file.

Data Structures
struct	Tc
struct	TcChannel
	TcChannel hardware registers. More...

Macros
#define	TC_BCR_SYNC   (0x1u << 0)
	(TC_BCR) Synchro Command
#define	TC_BMR_EDGPHA   (0x1u << 12)
	(TC_BMR) EDGe on PHA count mode
#define	TC_BMR_FILTER   (0x1u << 19)
	(TC_BMR) Glitch Filter
#define	TC_BMR_IDXPHB   (0x1u << 17)
	(TC_BMR) InDeX pin is PHB pin
#define	TC_BMR_INVA   (0x1u << 13)
	(TC_BMR) INVerted phA
#define	TC_BMR_INVB   (0x1u << 14)
	(TC_BMR) INVerted phB
#define	TC_BMR_INVIDX   (0x1u << 15)
	(TC_BMR) INVerted InDeX
#define	TC_BMR_MAXFILT(value)
#define	TC_BMR_MAXFILT_Msk   (0x3fu << TC_BMR_MAXFILT_Pos)
	(TC_BMR) MAXimum FILTer
#define	TC_BMR_MAXFILT_Pos   20
#define	TC_BMR_POSEN   (0x1u << 9)
	(TC_BMR) POSition ENabled
#define	TC_BMR_QDEN   (0x1u << 8)
	(TC_BMR) Quadrature Decoder ENabled
#define	TC_BMR_QDTRANS   (0x1u << 11)
	(TC_BMR) Quadrature Decoding TRANSparent
#define	TC_BMR_SPEEDEN   (0x1u << 10)
	(TC_BMR) SPEED ENabled
#define	TC_BMR_SWAP   (0x1u << 16)
	(TC_BMR) SWAP PHA and PHB
#define	TC_BMR_TC0XC0S_Msk   (0x3u << TC_BMR_TC0XC0S_Pos)
	(TC_BMR) External Clock Signal 0 Selection
#define	TC_BMR_TC0XC0S_Pos   0
#define	TC_BMR_TC0XC0S_TCLK0   (0x0u << 0)
	(TC_BMR) Signal connected to XC0: TCLK0
#define	TC_BMR_TC0XC0S_TIOA1   (0x2u << 0)
	(TC_BMR) Signal connected to XC0: TIOA1
#define	TC_BMR_TC0XC0S_TIOA2   (0x3u << 0)
	(TC_BMR) Signal connected to XC0: TIOA2
#define	TC_BMR_TC1XC1S_Msk   (0x3u << TC_BMR_TC1XC1S_Pos)
	(TC_BMR) External Clock Signal 1 Selection
#define	TC_BMR_TC1XC1S_Pos   2
#define	TC_BMR_TC1XC1S_TCLK1   (0x0u << 2)
	(TC_BMR) Signal connected to XC1: TCLK1
#define	TC_BMR_TC1XC1S_TIOA0   (0x2u << 2)
	(TC_BMR) Signal connected to XC1: TIOA0
#define	TC_BMR_TC1XC1S_TIOA2   (0x3u << 2)
	(TC_BMR) Signal connected to XC1: TIOA2
#define	TC_BMR_TC2XC2S_Msk   (0x3u << TC_BMR_TC2XC2S_Pos)
	(TC_BMR) External Clock Signal 2 Selection
#define	TC_BMR_TC2XC2S_Pos   4
#define	TC_BMR_TC2XC2S_TCLK2   (0x0u << 4)
	(TC_BMR) Signal connected to XC2: TCLK2
#define	TC_BMR_TC2XC2S_TIOA0   (0x2u << 4)
	(TC_BMR) Signal connected to XC2: TIOA0
#define	TC_BMR_TC2XC2S_TIOA1   (0x3u << 4)
	(TC_BMR) Signal connected to XC2: TIOA1
#define	TC_CCR_CLKDIS   (0x1u << 1)
	(TC_CCR) Counter Clock Disable Command
#define	TC_CCR_CLKEN   (0x1u << 0)
	(TC_CCR) Counter Clock Enable Command
#define	TC_CCR_SWTRG   (0x1u << 2)
	(TC_CCR) Software Trigger Command
#define	TC_CMR_ABETRG   (0x1u << 10)
	(TC_CMR) TIOA or TIOB External Trigger Selection
#define	TC_CMR_ACPA_CLEAR   (0x2u << 16)
	(TC_CMR) Clear
#define	TC_CMR_ACPA_Msk   (0x3u << TC_CMR_ACPA_Pos)
	(TC_CMR) RA Compare Effect on TIOA
#define	TC_CMR_ACPA_NONE   (0x0u << 16)
	(TC_CMR) None
#define	TC_CMR_ACPA_Pos   16
#define	TC_CMR_ACPA_SET   (0x1u << 16)
	(TC_CMR) Set
#define	TC_CMR_ACPA_TOGGLE   (0x3u << 16)
	(TC_CMR) Toggle
#define	TC_CMR_ACPC_CLEAR   (0x2u << 18)
	(TC_CMR) Clear
#define	TC_CMR_ACPC_Msk   (0x3u << TC_CMR_ACPC_Pos)
	(TC_CMR) RC Compare Effect on TIOA
#define	TC_CMR_ACPC_NONE   (0x0u << 18)
	(TC_CMR) None
#define	TC_CMR_ACPC_Pos   18
#define	TC_CMR_ACPC_SET   (0x1u << 18)
	(TC_CMR) Set
#define	TC_CMR_ACPC_TOGGLE   (0x3u << 18)
	(TC_CMR) Toggle
#define	TC_CMR_AEEVT_CLEAR   (0x2u << 20)
	(TC_CMR) Clear
#define	TC_CMR_AEEVT_Msk   (0x3u << TC_CMR_AEEVT_Pos)
	(TC_CMR) External Event Effect on TIOA
#define	TC_CMR_AEEVT_NONE   (0x0u << 20)
	(TC_CMR) None
#define	TC_CMR_AEEVT_Pos   20
#define	TC_CMR_AEEVT_SET   (0x1u << 20)
	(TC_CMR) Set
#define	TC_CMR_AEEVT_TOGGLE   (0x3u << 20)
	(TC_CMR) Toggle
#define	TC_CMR_ASWTRG_CLEAR   (0x2u << 22)
	(TC_CMR) Clear
#define	TC_CMR_ASWTRG_Msk   (0x3u << TC_CMR_ASWTRG_Pos)
	(TC_CMR) Software Trigger Effect on TIOA
#define	TC_CMR_ASWTRG_NONE   (0x0u << 22)
	(TC_CMR) None
#define	TC_CMR_ASWTRG_Pos   22
#define	TC_CMR_ASWTRG_SET   (0x1u << 22)
	(TC_CMR) Set
#define	TC_CMR_ASWTRG_TOGGLE   (0x3u << 22)
	(TC_CMR) Toggle
#define	TC_CMR_BCPB_CLEAR   (0x2u << 24)
	(TC_CMR) Clear
#define	TC_CMR_BCPB_Msk   (0x3u << TC_CMR_BCPB_Pos)
	(TC_CMR) RB Compare Effect on TIOB
#define	TC_CMR_BCPB_NONE   (0x0u << 24)
	(TC_CMR) None
#define	TC_CMR_BCPB_Pos   24
#define	TC_CMR_BCPB_SET   (0x1u << 24)
	(TC_CMR) Set
#define	TC_CMR_BCPB_TOGGLE   (0x3u << 24)
	(TC_CMR) Toggle
#define	TC_CMR_BCPC_CLEAR   (0x2u << 26)
	(TC_CMR) Clear
#define	TC_CMR_BCPC_Msk   (0x3u << TC_CMR_BCPC_Pos)
	(TC_CMR) RC Compare Effect on TIOB
#define	TC_CMR_BCPC_NONE   (0x0u << 26)
	(TC_CMR) None
#define	TC_CMR_BCPC_Pos   26
#define	TC_CMR_BCPC_SET   (0x1u << 26)
	(TC_CMR) Set
#define	TC_CMR_BCPC_TOGGLE   (0x3u << 26)
	(TC_CMR) Toggle
#define	TC_CMR_BEEVT_CLEAR   (0x2u << 28)
	(TC_CMR) Clear
#define	TC_CMR_BEEVT_Msk   (0x3u << TC_CMR_BEEVT_Pos)
	(TC_CMR) External Event Effect on TIOB
#define	TC_CMR_BEEVT_NONE   (0x0u << 28)
	(TC_CMR) None
#define	TC_CMR_BEEVT_Pos   28
#define	TC_CMR_BEEVT_SET   (0x1u << 28)
	(TC_CMR) Set
#define	TC_CMR_BEEVT_TOGGLE   (0x3u << 28)
	(TC_CMR) Toggle
#define	TC_CMR_BSWTRG_CLEAR   (0x2u << 30)
	(TC_CMR) Clear
#define	TC_CMR_BSWTRG_Msk   (0x3u << TC_CMR_BSWTRG_Pos)
	(TC_CMR) Software Trigger Effect on TIOB
#define	TC_CMR_BSWTRG_NONE   (0x0u << 30)
	(TC_CMR) None
#define	TC_CMR_BSWTRG_Pos   30
#define	TC_CMR_BSWTRG_SET   (0x1u << 30)
	(TC_CMR) Set
#define	TC_CMR_BSWTRG_TOGGLE   (0x3u << 30)
	(TC_CMR) Toggle
#define	TC_CMR_BURST_Msk   (0x3u << TC_CMR_BURST_Pos)
	(TC_CMR) Burst Signal Selection
#define	TC_CMR_BURST_NONE   (0x0u << 4)
	(TC_CMR) The clock is not gated by an external signal.
#define	TC_CMR_BURST_Pos   4
#define	TC_CMR_BURST_XC0   (0x1u << 4)
	(TC_CMR) XC0 is ANDed with the selected clock.
#define	TC_CMR_BURST_XC1   (0x2u << 4)
	(TC_CMR) XC1 is ANDed with the selected clock.
#define	TC_CMR_BURST_XC2   (0x3u << 4)
	(TC_CMR) XC2 is ANDed with the selected clock.
#define	TC_CMR_CLKI   (0x1u << 3)
	(TC_CMR) Clock Invert
#define	TC_CMR_CPCDIS   (0x1u << 7)
	(TC_CMR) Counter Clock Disable with RC Compare
#define	TC_CMR_CPCSTOP   (0x1u << 6)
	(TC_CMR) Counter Clock Stopped with RC Compare
#define	TC_CMR_CPCTRG   (0x1u << 14)
	(TC_CMR) RC Compare Trigger Enable
#define	TC_CMR_EEVT_Msk   (0x3u << TC_CMR_EEVT_Pos)
	(TC_CMR) External Event Selection
#define	TC_CMR_EEVT_Pos   10
#define	TC_CMR_EEVT_TIOB   (0x0u << 10)
	(TC_CMR) TIOB
#define	TC_CMR_EEVT_XC0   (0x1u << 10)
	(TC_CMR) XC0
#define	TC_CMR_EEVT_XC1   (0x2u << 10)
	(TC_CMR) XC1
#define	TC_CMR_EEVT_XC2   (0x3u << 10)
	(TC_CMR) XC2
#define	TC_CMR_EEVTEDG_EDGE   (0x3u << 8)
	(TC_CMR) Each edge
#define	TC_CMR_EEVTEDG_FALLING   (0x2u << 8)
	(TC_CMR) Falling edge
#define	TC_CMR_EEVTEDG_Msk   (0x3u << TC_CMR_EEVTEDG_Pos)
	(TC_CMR) External Event Edge Selection
#define	TC_CMR_EEVTEDG_NONE   (0x0u << 8)
	(TC_CMR) None
#define	TC_CMR_EEVTEDG_Pos   8
#define	TC_CMR_EEVTEDG_RISING   (0x1u << 8)
	(TC_CMR) Rising edge
#define	TC_CMR_ENETRG   (0x1u << 12)
	(TC_CMR) External Event Trigger Enable
#define	TC_CMR_ETRGEDG_EDGE   (0x3u << 8)
	(TC_CMR) Each edge
#define	TC_CMR_ETRGEDG_FALLING   (0x2u << 8)
	(TC_CMR) Falling edge
#define	TC_CMR_ETRGEDG_Msk   (0x3u << TC_CMR_ETRGEDG_Pos)
	(TC_CMR) External Trigger Edge Selection
#define	TC_CMR_ETRGEDG_NONE   (0x0u << 8)
	(TC_CMR) The clock is not gated by an external signal.
#define	TC_CMR_ETRGEDG_Pos   8
#define	TC_CMR_ETRGEDG_RISING   (0x1u << 8)
	(TC_CMR) Rising edge
#define	TC_CMR_LDBDIS   (0x1u << 7)
	(TC_CMR) Counter Clock Disable with RB Loading
#define	TC_CMR_LDBSTOP   (0x1u << 6)
	(TC_CMR) Counter Clock Stopped with RB Loading
#define	TC_CMR_LDRA_EDGE   (0x3u << 16)
	(TC_CMR) Each edge of TIOA
#define	TC_CMR_LDRA_FALLING   (0x2u << 16)
	(TC_CMR) Falling edge of TIOA
#define	TC_CMR_LDRA_Msk   (0x3u << TC_CMR_LDRA_Pos)
	(TC_CMR) RA Loading Edge Selection
#define	TC_CMR_LDRA_NONE   (0x0u << 16)
	(TC_CMR) None
#define	TC_CMR_LDRA_Pos   16
#define	TC_CMR_LDRA_RISING   (0x1u << 16)
	(TC_CMR) Rising edge of TIOA
#define	TC_CMR_LDRB_EDGE   (0x3u << 18)
	(TC_CMR) Each edge of TIOA
#define	TC_CMR_LDRB_FALLING   (0x2u << 18)
	(TC_CMR) Falling edge of TIOA
#define	TC_CMR_LDRB_Msk   (0x3u << TC_CMR_LDRB_Pos)
	(TC_CMR) RB Loading Edge Selection
#define	TC_CMR_LDRB_NONE   (0x0u << 18)
	(TC_CMR) None
#define	TC_CMR_LDRB_Pos   18
#define	TC_CMR_LDRB_RISING   (0x1u << 18)
	(TC_CMR) Rising edge of TIOA
#define	TC_CMR_TCCLKS_Msk   (0x7u << TC_CMR_TCCLKS_Pos)
	(TC_CMR) Clock Selection
#define	TC_CMR_TCCLKS_Pos   0
#define	TC_CMR_TCCLKS_TIMER_CLOCK1   (0x0u << 0)
	(TC_CMR) Clock selected: internal TIMER_CLOCK1 clock signal (from PMC)
#define	TC_CMR_TCCLKS_TIMER_CLOCK2   (0x1u << 0)
	(TC_CMR) Clock selected: internal TIMER_CLOCK2 clock signal (from PMC)
#define	TC_CMR_TCCLKS_TIMER_CLOCK3   (0x2u << 0)
	(TC_CMR) Clock selected: internal TIMER_CLOCK3 clock signal (from PMC)
#define	TC_CMR_TCCLKS_TIMER_CLOCK4   (0x3u << 0)
	(TC_CMR) Clock selected: internal TIMER_CLOCK4 clock signal (from PMC)
#define	TC_CMR_TCCLKS_TIMER_CLOCK5   (0x4u << 0)
	(TC_CMR) Clock selected: internal TIMER_CLOCK5 clock signal (from PMC)
#define	TC_CMR_TCCLKS_XC0   (0x5u << 0)
	(TC_CMR) Clock selected: XC0
#define	TC_CMR_TCCLKS_XC1   (0x6u << 0)
	(TC_CMR) Clock selected: XC1
#define	TC_CMR_TCCLKS_XC2   (0x7u << 0)
	(TC_CMR) Clock selected: XC2
#define	TC_CMR_WAVE   (0x1u << 15)
	(TC_CMR) Waveform Mode
#define	TC_CMR_WAVSEL_Msk   (0x3u << TC_CMR_WAVSEL_Pos)
	(TC_CMR) Waveform Selection
#define	TC_CMR_WAVSEL_Pos   13
#define	TC_CMR_WAVSEL_UP   (0x0u << 13)
	(TC_CMR) UP mode without automatic trigger on RC Compare
#define	TC_CMR_WAVSEL_UP_RC   (0x2u << 13)
	(TC_CMR) UP mode with automatic trigger on RC Compare
#define	TC_CMR_WAVSEL_UPDOWN   (0x1u << 13)
	(TC_CMR) UPDOWN mode without automatic trigger on RC Compare
#define	TC_CMR_WAVSEL_UPDOWN_RC   (0x3u << 13)
	(TC_CMR) UPDOWN mode with automatic trigger on RC Compare
#define	TC_CV_CV_Msk   (0xffffffffu << TC_CV_CV_Pos)
	(TC_CV) Counter Value
#define	TC_CV_CV_Pos   0
#define	TC_FMR_ENCF0   (0x1u << 0)
	(TC_FMR) ENable Compare Fault Channel 0
#define	TC_FMR_ENCF1   (0x1u << 1)
	(TC_FMR) ENable Compare Fault Channel 1
#define	TC_IDR_COVFS   (0x1u << 0)
	(TC_IDR) Counter Overflow
#define	TC_IDR_CPAS   (0x1u << 2)
	(TC_IDR) RA Compare
#define	TC_IDR_CPBS   (0x1u << 3)
	(TC_IDR) RB Compare
#define	TC_IDR_CPCS   (0x1u << 4)
	(TC_IDR) RC Compare
#define	TC_IDR_ETRGS   (0x1u << 7)
	(TC_IDR) External Trigger
#define	TC_IDR_LDRAS   (0x1u << 5)
	(TC_IDR) RA Loading
#define	TC_IDR_LDRBS   (0x1u << 6)
	(TC_IDR) RB Loading
#define	TC_IDR_LOVRS   (0x1u << 1)
	(TC_IDR) Load Overrun
#define	TC_IER_COVFS   (0x1u << 0)
	(TC_IER) Counter Overflow
#define	TC_IER_CPAS   (0x1u << 2)
	(TC_IER) RA Compare
#define	TC_IER_CPBS   (0x1u << 3)
	(TC_IER) RB Compare
#define	TC_IER_CPCS   (0x1u << 4)
	(TC_IER) RC Compare
#define	TC_IER_ETRGS   (0x1u << 7)
	(TC_IER) External Trigger
#define	TC_IER_LDRAS   (0x1u << 5)
	(TC_IER) RA Loading
#define	TC_IER_LDRBS   (0x1u << 6)
	(TC_IER) RB Loading
#define	TC_IER_LOVRS   (0x1u << 1)
	(TC_IER) Load Overrun
#define	TC_IMR_COVFS   (0x1u << 0)
	(TC_IMR) Counter Overflow
#define	TC_IMR_CPAS   (0x1u << 2)
	(TC_IMR) RA Compare
#define	TC_IMR_CPBS   (0x1u << 3)
	(TC_IMR) RB Compare
#define	TC_IMR_CPCS   (0x1u << 4)
	(TC_IMR) RC Compare
#define	TC_IMR_ETRGS   (0x1u << 7)
	(TC_IMR) External Trigger
#define	TC_IMR_LDRAS   (0x1u << 5)
	(TC_IMR) RA Loading
#define	TC_IMR_LDRBS   (0x1u << 6)
	(TC_IMR) RB Loading
#define	TC_IMR_LOVRS   (0x1u << 1)
	(TC_IMR) Load Overrun
#define	TC_QIDR_DIRCHG   (0x1u << 1)
	(TC_QIDR) DIRection CHanGe
#define	TC_QIDR_IDX   (0x1u << 0)
	(TC_QIDR) InDeX
#define	TC_QIDR_QERR   (0x1u << 2)
	(TC_QIDR) Quadrature ERRor
#define	TC_QIER_DIRCHG   (0x1u << 1)
	(TC_QIER) DIRection CHanGe
#define	TC_QIER_IDX   (0x1u << 0)
	(TC_QIER) InDeX
#define	TC_QIER_QERR   (0x1u << 2)
	(TC_QIER) Quadrature ERRor
#define	TC_QIMR_DIRCHG   (0x1u << 1)
	(TC_QIMR) DIRection CHanGe
#define	TC_QIMR_IDX   (0x1u << 0)
	(TC_QIMR) InDeX
#define	TC_QIMR_QERR   (0x1u << 2)
	(TC_QIMR) Quadrature ERRor
#define	TC_QISR_DIR   (0x1u << 8)
	(TC_QISR) DIRection
#define	TC_QISR_DIRCHG   (0x1u << 1)
	(TC_QISR) DIRection CHanGe
#define	TC_QISR_IDX   (0x1u << 0)
	(TC_QISR) InDeX
#define	TC_QISR_QERR   (0x1u << 2)
	(TC_QISR) Quadrature ERRor
#define	TC_RA_RA(value)
#define	TC_RA_RA_Msk   (0xffffffffu << TC_RA_RA_Pos)
	(TC_RA) Register A
#define	TC_RA_RA_Pos   0
#define	TC_RB_RB(value)
#define	TC_RB_RB_Msk   (0xffffffffu << TC_RB_RB_Pos)
	(TC_RB) Register B
#define	TC_RB_RB_Pos   0
#define	TC_RC_RC(value)
#define	TC_RC_RC_Msk   (0xffffffffu << TC_RC_RC_Pos)
	(TC_RC) Register C
#define	TC_RC_RC_Pos   0
#define	TC_SMMR_DOWN   (0x1u << 1)
	(TC_SMMR) DOWN Count
#define	TC_SMMR_GCEN   (0x1u << 0)
	(TC_SMMR) Gray Count Enable
#define	TC_SR_CLKSTA   (0x1u << 16)
	(TC_SR) Clock Enabling Status
#define	TC_SR_COVFS   (0x1u << 0)
	(TC_SR) Counter Overflow Status
#define	TC_SR_CPAS   (0x1u << 2)
	(TC_SR) RA Compare Status
#define	TC_SR_CPBS   (0x1u << 3)
	(TC_SR) RB Compare Status
#define	TC_SR_CPCS   (0x1u << 4)
	(TC_SR) RC Compare Status
#define	TC_SR_ETRGS   (0x1u << 7)
	(TC_SR) External Trigger Status
#define	TC_SR_LDRAS   (0x1u << 5)
	(TC_SR) RA Loading Status
#define	TC_SR_LDRBS   (0x1u << 6)
	(TC_SR) RB Loading Status
#define	TC_SR_LOVRS   (0x1u << 1)
	(TC_SR) Load Overrun Status
#define	TC_SR_MTIOA   (0x1u << 17)
	(TC_SR) TIOA Mirror
#define	TC_SR_MTIOB   (0x1u << 18)
	(TC_SR) TIOB Mirror
#define	TC_WPMR_WPEN   (0x1u << 0)
	(TC_WPMR) Write Protect Enable
#define	TC_WPMR_WPKEY_Msk   (0xffffffu << TC_WPMR_WPKEY_Pos)
	(TC_WPMR) Write Protect KEY
#define	TC_WPMR_WPKEY_PASSWD   (0x54494Du << 8)
	(TC_WPMR) Writing any other value in this field aborts the write operation of the WPEN bit.Always reads as 0.
#define	TC_WPMR_WPKEY_Pos   8
#define	TCCHANNEL_NUMBER   3
	Tc hardware registers.

Detailed Description

Copyright (c) 2012-2018 Microchip Technology Inc.

and its subsidiaries.

\cond ASF_LICENSE

Definition in file component_tc.h.

Macro Definition Documentation

TC_BCR_SYNC

#define TC_BCR_SYNC   (0x1u << 0)

(TC_BCR) Synchro Command

Definition at line 248 of file component_tc.h.

Referenced by tc_sync_trigger().

TC_BMR_EDGPHA

#define TC_BMR_EDGPHA   (0x1u << 12)

(TC_BMR) EDGe on PHA count mode

Definition at line 269 of file component_tc.h.

TC_BMR_FILTER

#define TC_BMR_FILTER   (0x1u << 19)

(TC_BMR) Glitch Filter

Definition at line 275 of file component_tc.h.

TC_BMR_IDXPHB

#define TC_BMR_IDXPHB   (0x1u << 17)

(TC_BMR) InDeX pin is PHB pin

Definition at line 274 of file component_tc.h.

TC_BMR_INVA

#define TC_BMR_INVA   (0x1u << 13)

(TC_BMR) INVerted phA

Definition at line 270 of file component_tc.h.

TC_BMR_INVB

#define TC_BMR_INVB   (0x1u << 14)

(TC_BMR) INVerted phB

Definition at line 271 of file component_tc.h.

TC_BMR_INVIDX

#define TC_BMR_INVIDX   (0x1u << 15)

(TC_BMR) INVerted InDeX

Definition at line 272 of file component_tc.h.

TC_BMR_MAXFILT

#define TC_BMR_MAXFILT

(

value

)

Value:

((TC_BMR_MAXFILT_Msk & ((value) << TC_BMR_MAXFILT_Pos)))

Definition at line 278 of file component_tc.h.

TC_BMR_MAXFILT_Msk

#define TC_BMR_MAXFILT_Msk   (0x3fu << TC_BMR_MAXFILT_Pos)

(TC_BMR) MAXimum FILTer

Definition at line 277 of file component_tc.h.

TC_BMR_MAXFILT_Pos

#define TC_BMR_MAXFILT_Pos   20

Definition at line 276 of file component_tc.h.

TC_BMR_POSEN

#define TC_BMR_POSEN   (0x1u << 9)

(TC_BMR) POSition ENabled

Definition at line 266 of file component_tc.h.

TC_BMR_QDEN

#define TC_BMR_QDEN   (0x1u << 8)

(TC_BMR) Quadrature Decoder ENabled

Definition at line 265 of file component_tc.h.

TC_BMR_QDTRANS

#define TC_BMR_QDTRANS   (0x1u << 11)

(TC_BMR) Quadrature Decoding TRANSparent

Definition at line 268 of file component_tc.h.

TC_BMR_SPEEDEN

#define TC_BMR_SPEEDEN   (0x1u << 10)

(TC_BMR) SPEED ENabled

Definition at line 267 of file component_tc.h.

TC_BMR_SWAP

#define TC_BMR_SWAP   (0x1u << 16)

(TC_BMR) SWAP PHA and PHB

Definition at line 273 of file component_tc.h.

TC_BMR_TC0XC0S_Msk

#define TC_BMR_TC0XC0S_Msk   (0x3u << TC_BMR_TC0XC0S_Pos)

(TC_BMR) External Clock Signal 0 Selection

Definition at line 251 of file component_tc.h.

TC_BMR_TC0XC0S_Pos

#define TC_BMR_TC0XC0S_Pos   0

Definition at line 250 of file component_tc.h.

TC_BMR_TC0XC0S_TCLK0

#define TC_BMR_TC0XC0S_TCLK0   (0x0u << 0)

(TC_BMR) Signal connected to XC0: TCLK0

Definition at line 252 of file component_tc.h.

TC_BMR_TC0XC0S_TIOA1

#define TC_BMR_TC0XC0S_TIOA1   (0x2u << 0)

(TC_BMR) Signal connected to XC0: TIOA1

Definition at line 253 of file component_tc.h.

TC_BMR_TC0XC0S_TIOA2

#define TC_BMR_TC0XC0S_TIOA2   (0x3u << 0)

(TC_BMR) Signal connected to XC0: TIOA2

Definition at line 254 of file component_tc.h.

TC_BMR_TC1XC1S_Msk

#define TC_BMR_TC1XC1S_Msk   (0x3u << TC_BMR_TC1XC1S_Pos)

(TC_BMR) External Clock Signal 1 Selection

Definition at line 256 of file component_tc.h.

TC_BMR_TC1XC1S_Pos

#define TC_BMR_TC1XC1S_Pos   2

Definition at line 255 of file component_tc.h.

TC_BMR_TC1XC1S_TCLK1

#define TC_BMR_TC1XC1S_TCLK1   (0x0u << 2)

(TC_BMR) Signal connected to XC1: TCLK1

Definition at line 257 of file component_tc.h.

TC_BMR_TC1XC1S_TIOA0

#define TC_BMR_TC1XC1S_TIOA0   (0x2u << 2)

(TC_BMR) Signal connected to XC1: TIOA0

Definition at line 258 of file component_tc.h.

TC_BMR_TC1XC1S_TIOA2

#define TC_BMR_TC1XC1S_TIOA2   (0x3u << 2)

(TC_BMR) Signal connected to XC1: TIOA2

Definition at line 259 of file component_tc.h.

TC_BMR_TC2XC2S_Msk

#define TC_BMR_TC2XC2S_Msk   (0x3u << TC_BMR_TC2XC2S_Pos)

(TC_BMR) External Clock Signal 2 Selection

Definition at line 261 of file component_tc.h.

TC_BMR_TC2XC2S_Pos

#define TC_BMR_TC2XC2S_Pos   4

Definition at line 260 of file component_tc.h.

TC_BMR_TC2XC2S_TCLK2

#define TC_BMR_TC2XC2S_TCLK2   (0x0u << 4)

(TC_BMR) Signal connected to XC2: TCLK2

Definition at line 262 of file component_tc.h.

TC_BMR_TC2XC2S_TIOA0

#define TC_BMR_TC2XC2S_TIOA0   (0x2u << 4)

(TC_BMR) Signal connected to XC2: TIOA0

Definition at line 263 of file component_tc.h.

TC_BMR_TC2XC2S_TIOA1

#define TC_BMR_TC2XC2S_TIOA1   (0x3u << 4)

(TC_BMR) Signal connected to XC2: TIOA1

Definition at line 264 of file component_tc.h.

TC_CCR_CLKDIS

#define TC_CCR_CLKDIS   (0x1u << 1)

(TC_CCR) Counter Clock Disable Command

Definition at line 78 of file component_tc.h.

Referenced by tc_init(), and tc_stop().

TC_CCR_CLKEN

#define TC_CCR_CLKEN   (0x1u << 0)

(TC_CCR) Counter Clock Enable Command

Definition at line 77 of file component_tc.h.

Referenced by tc_start().

TC_CCR_SWTRG

#define TC_CCR_SWTRG   (0x1u << 2)

(TC_CCR) Software Trigger Command

Definition at line 79 of file component_tc.h.

Referenced by tc_start().

TC_CMR_ABETRG

#define TC_CMR_ABETRG   (0x1u << 10)

(TC_CMR) TIOA or TIOB External Trigger Selection

Definition at line 106 of file component_tc.h.

TC_CMR_ACPA_CLEAR

#define TC_CMR_ACPA_CLEAR   (0x2u << 16)

(TC_CMR) Clear

Definition at line 146 of file component_tc.h.

TC_CMR_ACPA_Msk

#define TC_CMR_ACPA_Msk   (0x3u << TC_CMR_ACPA_Pos)

(TC_CMR) RA Compare Effect on TIOA

Definition at line 143 of file component_tc.h.

TC_CMR_ACPA_NONE

#define TC_CMR_ACPA_NONE   (0x0u << 16)

(TC_CMR) None

Definition at line 144 of file component_tc.h.

TC_CMR_ACPA_Pos

#define TC_CMR_ACPA_Pos   16

Definition at line 142 of file component_tc.h.

TC_CMR_ACPA_SET

#define TC_CMR_ACPA_SET   (0x1u << 16)

(TC_CMR) Set

Definition at line 145 of file component_tc.h.

TC_CMR_ACPA_TOGGLE

#define TC_CMR_ACPA_TOGGLE   (0x3u << 16)

(TC_CMR) Toggle

Definition at line 147 of file component_tc.h.

TC_CMR_ACPC_CLEAR

#define TC_CMR_ACPC_CLEAR   (0x2u << 18)

(TC_CMR) Clear

Definition at line 152 of file component_tc.h.

TC_CMR_ACPC_Msk

#define TC_CMR_ACPC_Msk   (0x3u << TC_CMR_ACPC_Pos)

(TC_CMR) RC Compare Effect on TIOA

Definition at line 149 of file component_tc.h.

TC_CMR_ACPC_NONE

#define TC_CMR_ACPC_NONE   (0x0u << 18)

(TC_CMR) None

Definition at line 150 of file component_tc.h.

TC_CMR_ACPC_Pos

#define TC_CMR_ACPC_Pos   18

Definition at line 148 of file component_tc.h.

TC_CMR_ACPC_SET

#define TC_CMR_ACPC_SET   (0x1u << 18)

(TC_CMR) Set

Definition at line 151 of file component_tc.h.

TC_CMR_ACPC_TOGGLE

#define TC_CMR_ACPC_TOGGLE   (0x3u << 18)

(TC_CMR) Toggle

Definition at line 153 of file component_tc.h.

TC_CMR_AEEVT_CLEAR

#define TC_CMR_AEEVT_CLEAR   (0x2u << 20)

(TC_CMR) Clear

Definition at line 158 of file component_tc.h.

TC_CMR_AEEVT_Msk

#define TC_CMR_AEEVT_Msk   (0x3u << TC_CMR_AEEVT_Pos)

(TC_CMR) External Event Effect on TIOA

Definition at line 155 of file component_tc.h.

TC_CMR_AEEVT_NONE

#define TC_CMR_AEEVT_NONE   (0x0u << 20)

(TC_CMR) None

Definition at line 156 of file component_tc.h.

TC_CMR_AEEVT_Pos

#define TC_CMR_AEEVT_Pos   20

Definition at line 154 of file component_tc.h.

TC_CMR_AEEVT_SET

#define TC_CMR_AEEVT_SET   (0x1u << 20)

(TC_CMR) Set

Definition at line 157 of file component_tc.h.

TC_CMR_AEEVT_TOGGLE

#define TC_CMR_AEEVT_TOGGLE   (0x3u << 20)

(TC_CMR) Toggle

Definition at line 159 of file component_tc.h.

TC_CMR_ASWTRG_CLEAR

#define TC_CMR_ASWTRG_CLEAR   (0x2u << 22)

(TC_CMR) Clear

Definition at line 164 of file component_tc.h.

TC_CMR_ASWTRG_Msk

#define TC_CMR_ASWTRG_Msk   (0x3u << TC_CMR_ASWTRG_Pos)

(TC_CMR) Software Trigger Effect on TIOA

Definition at line 161 of file component_tc.h.

TC_CMR_ASWTRG_NONE

#define TC_CMR_ASWTRG_NONE   (0x0u << 22)

(TC_CMR) None

Definition at line 162 of file component_tc.h.

TC_CMR_ASWTRG_Pos

#define TC_CMR_ASWTRG_Pos   22

Definition at line 160 of file component_tc.h.

TC_CMR_ASWTRG_SET

#define TC_CMR_ASWTRG_SET   (0x1u << 22)

(TC_CMR) Set

Definition at line 163 of file component_tc.h.

TC_CMR_ASWTRG_TOGGLE

#define TC_CMR_ASWTRG_TOGGLE   (0x3u << 22)

(TC_CMR) Toggle

Definition at line 165 of file component_tc.h.

TC_CMR_BCPB_CLEAR

#define TC_CMR_BCPB_CLEAR   (0x2u << 24)

(TC_CMR) Clear

Definition at line 170 of file component_tc.h.

TC_CMR_BCPB_Msk

#define TC_CMR_BCPB_Msk   (0x3u << TC_CMR_BCPB_Pos)

(TC_CMR) RB Compare Effect on TIOB

Definition at line 167 of file component_tc.h.

TC_CMR_BCPB_NONE

#define TC_CMR_BCPB_NONE   (0x0u << 24)

(TC_CMR) None

Definition at line 168 of file component_tc.h.

TC_CMR_BCPB_Pos

#define TC_CMR_BCPB_Pos   24

Definition at line 166 of file component_tc.h.

TC_CMR_BCPB_SET

#define TC_CMR_BCPB_SET   (0x1u << 24)

(TC_CMR) Set

Definition at line 169 of file component_tc.h.

TC_CMR_BCPB_TOGGLE

#define TC_CMR_BCPB_TOGGLE   (0x3u << 24)

(TC_CMR) Toggle

Definition at line 171 of file component_tc.h.

TC_CMR_BCPC_CLEAR

#define TC_CMR_BCPC_CLEAR   (0x2u << 26)

(TC_CMR) Clear

Definition at line 176 of file component_tc.h.

TC_CMR_BCPC_Msk

#define TC_CMR_BCPC_Msk   (0x3u << TC_CMR_BCPC_Pos)

(TC_CMR) RC Compare Effect on TIOB

Definition at line 173 of file component_tc.h.

TC_CMR_BCPC_NONE

#define TC_CMR_BCPC_NONE   (0x0u << 26)

(TC_CMR) None

Definition at line 174 of file component_tc.h.

TC_CMR_BCPC_Pos

#define TC_CMR_BCPC_Pos   26

Definition at line 172 of file component_tc.h.

TC_CMR_BCPC_SET

#define TC_CMR_BCPC_SET   (0x1u << 26)

(TC_CMR) Set

Definition at line 175 of file component_tc.h.

TC_CMR_BCPC_TOGGLE

#define TC_CMR_BCPC_TOGGLE   (0x3u << 26)

(TC_CMR) Toggle

Definition at line 177 of file component_tc.h.

TC_CMR_BEEVT_CLEAR

#define TC_CMR_BEEVT_CLEAR   (0x2u << 28)

(TC_CMR) Clear

Definition at line 182 of file component_tc.h.

TC_CMR_BEEVT_Msk

#define TC_CMR_BEEVT_Msk   (0x3u << TC_CMR_BEEVT_Pos)

(TC_CMR) External Event Effect on TIOB

Definition at line 179 of file component_tc.h.

TC_CMR_BEEVT_NONE

#define TC_CMR_BEEVT_NONE   (0x0u << 28)

(TC_CMR) None

Definition at line 180 of file component_tc.h.

TC_CMR_BEEVT_Pos

#define TC_CMR_BEEVT_Pos   28

Definition at line 178 of file component_tc.h.

TC_CMR_BEEVT_SET

#define TC_CMR_BEEVT_SET   (0x1u << 28)

(TC_CMR) Set

Definition at line 181 of file component_tc.h.

TC_CMR_BEEVT_TOGGLE

#define TC_CMR_BEEVT_TOGGLE   (0x3u << 28)

(TC_CMR) Toggle

Definition at line 183 of file component_tc.h.

TC_CMR_BSWTRG_CLEAR

#define TC_CMR_BSWTRG_CLEAR   (0x2u << 30)

(TC_CMR) Clear

Definition at line 188 of file component_tc.h.

TC_CMR_BSWTRG_Msk

#define TC_CMR_BSWTRG_Msk   (0x3u << TC_CMR_BSWTRG_Pos)

(TC_CMR) Software Trigger Effect on TIOB

Definition at line 185 of file component_tc.h.

TC_CMR_BSWTRG_NONE

#define TC_CMR_BSWTRG_NONE   (0x0u << 30)

(TC_CMR) None

Definition at line 186 of file component_tc.h.

TC_CMR_BSWTRG_Pos

#define TC_CMR_BSWTRG_Pos   30

Definition at line 184 of file component_tc.h.

TC_CMR_BSWTRG_SET

#define TC_CMR_BSWTRG_SET   (0x1u << 30)

(TC_CMR) Set

Definition at line 187 of file component_tc.h.

TC_CMR_BSWTRG_TOGGLE

#define TC_CMR_BSWTRG_TOGGLE   (0x3u << 30)

(TC_CMR) Toggle

Definition at line 189 of file component_tc.h.

TC_CMR_BURST_Msk

#define TC_CMR_BURST_Msk   (0x3u << TC_CMR_BURST_Pos)

(TC_CMR) Burst Signal Selection

Definition at line 93 of file component_tc.h.

TC_CMR_BURST_NONE

#define TC_CMR_BURST_NONE   (0x0u << 4)

(TC_CMR) The clock is not gated by an external signal.

Definition at line 94 of file component_tc.h.

TC_CMR_BURST_Pos

#define TC_CMR_BURST_Pos   4

Definition at line 92 of file component_tc.h.

TC_CMR_BURST_XC0

#define TC_CMR_BURST_XC0   (0x1u << 4)

(TC_CMR) XC0 is ANDed with the selected clock.

Definition at line 95 of file component_tc.h.

TC_CMR_BURST_XC1

#define TC_CMR_BURST_XC1   (0x2u << 4)

(TC_CMR) XC1 is ANDed with the selected clock.

Definition at line 96 of file component_tc.h.

TC_CMR_BURST_XC2

#define TC_CMR_BURST_XC2   (0x3u << 4)

(TC_CMR) XC2 is ANDed with the selected clock.

Definition at line 97 of file component_tc.h.

TC_CMR_CLKI

#define TC_CMR_CLKI   (0x1u << 3)

(TC_CMR) Clock Invert

Definition at line 91 of file component_tc.h.

TC_CMR_CPCDIS

#define TC_CMR_CPCDIS   (0x1u << 7)

(TC_CMR) Counter Clock Disable with RC Compare

Definition at line 122 of file component_tc.h.

TC_CMR_CPCSTOP

#define TC_CMR_CPCSTOP   (0x1u << 6)

(TC_CMR) Counter Clock Stopped with RC Compare

Definition at line 121 of file component_tc.h.

TC_CMR_CPCTRG

#define TC_CMR_CPCTRG   (0x1u << 14)

(TC_CMR) RC Compare Trigger Enable

Definition at line 107 of file component_tc.h.

TC_CMR_EEVT_Msk

#define TC_CMR_EEVT_Msk   (0x3u << TC_CMR_EEVT_Pos)

(TC_CMR) External Event Selection

Definition at line 130 of file component_tc.h.

TC_CMR_EEVT_Pos

#define TC_CMR_EEVT_Pos   10

Definition at line 129 of file component_tc.h.

TC_CMR_EEVT_TIOB

#define TC_CMR_EEVT_TIOB   (0x0u << 10)

(TC_CMR) TIOB

Definition at line 131 of file component_tc.h.

TC_CMR_EEVT_XC0

#define TC_CMR_EEVT_XC0   (0x1u << 10)

(TC_CMR) XC0

Definition at line 132 of file component_tc.h.

TC_CMR_EEVT_XC1

#define TC_CMR_EEVT_XC1   (0x2u << 10)

(TC_CMR) XC1

Definition at line 133 of file component_tc.h.

TC_CMR_EEVT_XC2

#define TC_CMR_EEVT_XC2   (0x3u << 10)

(TC_CMR) XC2

Definition at line 134 of file component_tc.h.

TC_CMR_EEVTEDG_EDGE

#define TC_CMR_EEVTEDG_EDGE   (0x3u << 8)

(TC_CMR) Each edge

Definition at line 128 of file component_tc.h.

TC_CMR_EEVTEDG_FALLING

#define TC_CMR_EEVTEDG_FALLING   (0x2u << 8)

(TC_CMR) Falling edge

Definition at line 127 of file component_tc.h.

TC_CMR_EEVTEDG_Msk

#define TC_CMR_EEVTEDG_Msk   (0x3u << TC_CMR_EEVTEDG_Pos)

(TC_CMR) External Event Edge Selection

Definition at line 124 of file component_tc.h.

TC_CMR_EEVTEDG_NONE

#define TC_CMR_EEVTEDG_NONE   (0x0u << 8)

(TC_CMR) None

Definition at line 125 of file component_tc.h.

TC_CMR_EEVTEDG_Pos

#define TC_CMR_EEVTEDG_Pos   8

Definition at line 123 of file component_tc.h.

TC_CMR_EEVTEDG_RISING

#define TC_CMR_EEVTEDG_RISING   (0x1u << 8)

(TC_CMR) Rising edge

Definition at line 126 of file component_tc.h.

TC_CMR_ENETRG

#define TC_CMR_ENETRG   (0x1u << 12)

(TC_CMR) External Event Trigger Enable

Definition at line 135 of file component_tc.h.

TC_CMR_ETRGEDG_EDGE

#define TC_CMR_ETRGEDG_EDGE   (0x3u << 8)

(TC_CMR) Each edge

Definition at line 105 of file component_tc.h.

TC_CMR_ETRGEDG_FALLING

#define TC_CMR_ETRGEDG_FALLING   (0x2u << 8)

(TC_CMR) Falling edge

Definition at line 104 of file component_tc.h.

TC_CMR_ETRGEDG_Msk

#define TC_CMR_ETRGEDG_Msk   (0x3u << TC_CMR_ETRGEDG_Pos)

(TC_CMR) External Trigger Edge Selection

Definition at line 101 of file component_tc.h.

TC_CMR_ETRGEDG_NONE

#define TC_CMR_ETRGEDG_NONE   (0x0u << 8)

(TC_CMR) The clock is not gated by an external signal.

Definition at line 102 of file component_tc.h.

TC_CMR_ETRGEDG_Pos

#define TC_CMR_ETRGEDG_Pos   8

Definition at line 100 of file component_tc.h.

TC_CMR_ETRGEDG_RISING

#define TC_CMR_ETRGEDG_RISING   (0x1u << 8)

(TC_CMR) Rising edge

Definition at line 103 of file component_tc.h.

TC_CMR_LDBDIS

#define TC_CMR_LDBDIS   (0x1u << 7)

(TC_CMR) Counter Clock Disable with RB Loading

Definition at line 99 of file component_tc.h.

TC_CMR_LDBSTOP

#define TC_CMR_LDBSTOP   (0x1u << 6)

(TC_CMR) Counter Clock Stopped with RB Loading

Definition at line 98 of file component_tc.h.

TC_CMR_LDRA_EDGE

#define TC_CMR_LDRA_EDGE   (0x3u << 16)

(TC_CMR) Each edge of TIOA

Definition at line 114 of file component_tc.h.

TC_CMR_LDRA_FALLING

#define TC_CMR_LDRA_FALLING   (0x2u << 16)

(TC_CMR) Falling edge of TIOA

Definition at line 113 of file component_tc.h.

TC_CMR_LDRA_Msk

#define TC_CMR_LDRA_Msk   (0x3u << TC_CMR_LDRA_Pos)

(TC_CMR) RA Loading Edge Selection

Definition at line 110 of file component_tc.h.

TC_CMR_LDRA_NONE

#define TC_CMR_LDRA_NONE   (0x0u << 16)

(TC_CMR) None

Definition at line 111 of file component_tc.h.

TC_CMR_LDRA_Pos

#define TC_CMR_LDRA_Pos   16

Definition at line 109 of file component_tc.h.

TC_CMR_LDRA_RISING

#define TC_CMR_LDRA_RISING   (0x1u << 16)

(TC_CMR) Rising edge of TIOA

Definition at line 112 of file component_tc.h.

TC_CMR_LDRB_EDGE

#define TC_CMR_LDRB_EDGE   (0x3u << 18)

(TC_CMR) Each edge of TIOA

Definition at line 120 of file component_tc.h.

TC_CMR_LDRB_FALLING

#define TC_CMR_LDRB_FALLING   (0x2u << 18)

(TC_CMR) Falling edge of TIOA

Definition at line 119 of file component_tc.h.

TC_CMR_LDRB_Msk

#define TC_CMR_LDRB_Msk   (0x3u << TC_CMR_LDRB_Pos)

(TC_CMR) RB Loading Edge Selection

Definition at line 116 of file component_tc.h.

TC_CMR_LDRB_NONE

#define TC_CMR_LDRB_NONE   (0x0u << 18)

(TC_CMR) None

Definition at line 117 of file component_tc.h.

TC_CMR_LDRB_Pos

#define TC_CMR_LDRB_Pos   18

Definition at line 115 of file component_tc.h.

TC_CMR_LDRB_RISING

#define TC_CMR_LDRB_RISING   (0x1u << 18)

(TC_CMR) Rising edge of TIOA

Definition at line 118 of file component_tc.h.

TC_CMR_TCCLKS_Msk

#define TC_CMR_TCCLKS_Msk   (0x7u << TC_CMR_TCCLKS_Pos)

(TC_CMR) Clock Selection

Definition at line 82 of file component_tc.h.

TC_CMR_TCCLKS_Pos

#define TC_CMR_TCCLKS_Pos   0

Definition at line 81 of file component_tc.h.

TC_CMR_TCCLKS_TIMER_CLOCK1

#define TC_CMR_TCCLKS_TIMER_CLOCK1   (0x0u << 0)

(TC_CMR) Clock selected: internal TIMER_CLOCK1 clock signal (from PMC)

Definition at line 83 of file component_tc.h.

TC_CMR_TCCLKS_TIMER_CLOCK2

#define TC_CMR_TCCLKS_TIMER_CLOCK2   (0x1u << 0)

(TC_CMR) Clock selected: internal TIMER_CLOCK2 clock signal (from PMC)

Definition at line 84 of file component_tc.h.

TC_CMR_TCCLKS_TIMER_CLOCK3

#define TC_CMR_TCCLKS_TIMER_CLOCK3   (0x2u << 0)

(TC_CMR) Clock selected: internal TIMER_CLOCK3 clock signal (from PMC)

Definition at line 85 of file component_tc.h.

TC_CMR_TCCLKS_TIMER_CLOCK4

#define TC_CMR_TCCLKS_TIMER_CLOCK4   (0x3u << 0)

(TC_CMR) Clock selected: internal TIMER_CLOCK4 clock signal (from PMC)

Definition at line 86 of file component_tc.h.

TC_CMR_TCCLKS_TIMER_CLOCK5

#define TC_CMR_TCCLKS_TIMER_CLOCK5   (0x4u << 0)

(TC_CMR) Clock selected: internal TIMER_CLOCK5 clock signal (from PMC)

Definition at line 87 of file component_tc.h.

TC_CMR_TCCLKS_XC0

#define TC_CMR_TCCLKS_XC0   (0x5u << 0)

(TC_CMR) Clock selected: XC0

Definition at line 88 of file component_tc.h.

TC_CMR_TCCLKS_XC1

#define TC_CMR_TCCLKS_XC1   (0x6u << 0)

(TC_CMR) Clock selected: XC1

Definition at line 89 of file component_tc.h.

TC_CMR_TCCLKS_XC2

#define TC_CMR_TCCLKS_XC2   (0x7u << 0)

(TC_CMR) Clock selected: XC2

Definition at line 90 of file component_tc.h.

TC_CMR_WAVE

#define TC_CMR_WAVE   (0x1u << 15)

(TC_CMR) Waveform Mode

Definition at line 108 of file component_tc.h.

TC_CMR_WAVSEL_Msk

#define TC_CMR_WAVSEL_Msk   (0x3u << TC_CMR_WAVSEL_Pos)

(TC_CMR) Waveform Selection

Definition at line 137 of file component_tc.h.

TC_CMR_WAVSEL_Pos

#define TC_CMR_WAVSEL_Pos   13

Definition at line 136 of file component_tc.h.

TC_CMR_WAVSEL_UP

#define TC_CMR_WAVSEL_UP   (0x0u << 13)

(TC_CMR) UP mode without automatic trigger on RC Compare

Definition at line 138 of file component_tc.h.

TC_CMR_WAVSEL_UP_RC

#define TC_CMR_WAVSEL_UP_RC   (0x2u << 13)

(TC_CMR) UP mode with automatic trigger on RC Compare

Definition at line 140 of file component_tc.h.

TC_CMR_WAVSEL_UPDOWN

#define TC_CMR_WAVSEL_UPDOWN   (0x1u << 13)

(TC_CMR) UPDOWN mode without automatic trigger on RC Compare

Definition at line 139 of file component_tc.h.

TC_CMR_WAVSEL_UPDOWN_RC

#define TC_CMR_WAVSEL_UPDOWN_RC   (0x3u << 13)

(TC_CMR) UPDOWN mode with automatic trigger on RC Compare

Definition at line 141 of file component_tc.h.

TC_CV_CV_Msk

#define TC_CV_CV_Msk   (0xffffffffu << TC_CV_CV_Pos)

(TC_CV) Counter Value

Definition at line 195 of file component_tc.h.

TC_CV_CV_Pos

#define TC_CV_CV_Pos   0

Definition at line 194 of file component_tc.h.

TC_FMR_ENCF0

#define TC_FMR_ENCF0   (0x1u << 0)

(TC_FMR) ENable Compare Fault Channel 0

Definition at line 297 of file component_tc.h.

TC_FMR_ENCF1

#define TC_FMR_ENCF1   (0x1u << 1)

(TC_FMR) ENable Compare Fault Channel 1

Definition at line 298 of file component_tc.h.

TC_IDR_COVFS

#define TC_IDR_COVFS   (0x1u << 0)

(TC_IDR) Counter Overflow

Definition at line 230 of file component_tc.h.

TC_IDR_CPAS

#define TC_IDR_CPAS   (0x1u << 2)

(TC_IDR) RA Compare

Definition at line 232 of file component_tc.h.

TC_IDR_CPBS

#define TC_IDR_CPBS   (0x1u << 3)

(TC_IDR) RB Compare

Definition at line 233 of file component_tc.h.

TC_IDR_CPCS

#define TC_IDR_CPCS   (0x1u << 4)

(TC_IDR) RC Compare

Definition at line 234 of file component_tc.h.

TC_IDR_ETRGS

#define TC_IDR_ETRGS   (0x1u << 7)

(TC_IDR) External Trigger

Definition at line 237 of file component_tc.h.

TC_IDR_LDRAS

#define TC_IDR_LDRAS   (0x1u << 5)

(TC_IDR) RA Loading

Definition at line 235 of file component_tc.h.

TC_IDR_LDRBS

#define TC_IDR_LDRBS   (0x1u << 6)

(TC_IDR) RB Loading

Definition at line 236 of file component_tc.h.

TC_IDR_LOVRS

#define TC_IDR_LOVRS   (0x1u << 1)

(TC_IDR) Load Overrun

Definition at line 231 of file component_tc.h.

TC_IER_COVFS

#define TC_IER_COVFS   (0x1u << 0)

(TC_IER) Counter Overflow

Definition at line 221 of file component_tc.h.

TC_IER_CPAS

#define TC_IER_CPAS   (0x1u << 2)

(TC_IER) RA Compare

Definition at line 223 of file component_tc.h.

TC_IER_CPBS

#define TC_IER_CPBS   (0x1u << 3)

(TC_IER) RB Compare

Definition at line 224 of file component_tc.h.

TC_IER_CPCS

#define TC_IER_CPCS   (0x1u << 4)

(TC_IER) RC Compare

Definition at line 225 of file component_tc.h.

TC_IER_ETRGS

#define TC_IER_ETRGS   (0x1u << 7)

(TC_IER) External Trigger

Definition at line 228 of file component_tc.h.

TC_IER_LDRAS

#define TC_IER_LDRAS   (0x1u << 5)

(TC_IER) RA Loading

Definition at line 226 of file component_tc.h.

TC_IER_LDRBS

#define TC_IER_LDRBS   (0x1u << 6)

(TC_IER) RB Loading

Definition at line 227 of file component_tc.h.

TC_IER_LOVRS

#define TC_IER_LOVRS   (0x1u << 1)

(TC_IER) Load Overrun

Definition at line 222 of file component_tc.h.

TC_IMR_COVFS

#define TC_IMR_COVFS   (0x1u << 0)

(TC_IMR) Counter Overflow

Definition at line 239 of file component_tc.h.

TC_IMR_CPAS

#define TC_IMR_CPAS   (0x1u << 2)

(TC_IMR) RA Compare

Definition at line 241 of file component_tc.h.

TC_IMR_CPBS

#define TC_IMR_CPBS   (0x1u << 3)

(TC_IMR) RB Compare

Definition at line 242 of file component_tc.h.

TC_IMR_CPCS

#define TC_IMR_CPCS   (0x1u << 4)

(TC_IMR) RC Compare

Definition at line 243 of file component_tc.h.

TC_IMR_ETRGS

#define TC_IMR_ETRGS   (0x1u << 7)

(TC_IMR) External Trigger

Definition at line 246 of file component_tc.h.

TC_IMR_LDRAS

#define TC_IMR_LDRAS   (0x1u << 5)

(TC_IMR) RA Loading

Definition at line 244 of file component_tc.h.

TC_IMR_LDRBS

#define TC_IMR_LDRBS   (0x1u << 6)

(TC_IMR) RB Loading

Definition at line 245 of file component_tc.h.

TC_IMR_LOVRS

#define TC_IMR_LOVRS   (0x1u << 1)

(TC_IMR) Load Overrun

Definition at line 240 of file component_tc.h.

TC_QIDR_DIRCHG

#define TC_QIDR_DIRCHG   (0x1u << 1)

(TC_QIDR) DIRection CHanGe

Definition at line 285 of file component_tc.h.

TC_QIDR_IDX

#define TC_QIDR_IDX   (0x1u << 0)

(TC_QIDR) InDeX

Definition at line 284 of file component_tc.h.

TC_QIDR_QERR

#define TC_QIDR_QERR   (0x1u << 2)

(TC_QIDR) Quadrature ERRor

Definition at line 286 of file component_tc.h.

TC_QIER_DIRCHG

#define TC_QIER_DIRCHG   (0x1u << 1)

(TC_QIER) DIRection CHanGe

Definition at line 281 of file component_tc.h.

TC_QIER_IDX

#define TC_QIER_IDX   (0x1u << 0)

(TC_QIER) InDeX

Definition at line 280 of file component_tc.h.

TC_QIER_QERR

#define TC_QIER_QERR   (0x1u << 2)

(TC_QIER) Quadrature ERRor

Definition at line 282 of file component_tc.h.

TC_QIMR_DIRCHG

#define TC_QIMR_DIRCHG   (0x1u << 1)

(TC_QIMR) DIRection CHanGe

Definition at line 289 of file component_tc.h.

TC_QIMR_IDX

#define TC_QIMR_IDX   (0x1u << 0)

(TC_QIMR) InDeX

Definition at line 288 of file component_tc.h.

TC_QIMR_QERR

#define TC_QIMR_QERR   (0x1u << 2)

(TC_QIMR) Quadrature ERRor

Definition at line 290 of file component_tc.h.

TC_QISR_DIR

#define TC_QISR_DIR   (0x1u << 8)

(TC_QISR) DIRection

Definition at line 295 of file component_tc.h.

TC_QISR_DIRCHG

#define TC_QISR_DIRCHG   (0x1u << 1)

(TC_QISR) DIRection CHanGe

Definition at line 293 of file component_tc.h.

TC_QISR_IDX

#define TC_QISR_IDX   (0x1u << 0)

(TC_QISR) InDeX

Definition at line 292 of file component_tc.h.

TC_QISR_QERR

#define TC_QISR_QERR   (0x1u << 2)

(TC_QISR) Quadrature ERRor

Definition at line 294 of file component_tc.h.

TC_RA_RA

#define TC_RA_RA

(

value

)

Value:

((TC_RA_RA_Msk & ((value) << TC_RA_RA_Pos)))

Definition at line 199 of file component_tc.h.

TC_RA_RA_Msk

#define TC_RA_RA_Msk   (0xffffffffu << TC_RA_RA_Pos)

(TC_RA) Register A

Definition at line 198 of file component_tc.h.

TC_RA_RA_Pos

#define TC_RA_RA_Pos   0

Definition at line 197 of file component_tc.h.

TC_RB_RB

#define TC_RB_RB

(

value

)

Value:

((TC_RB_RB_Msk & ((value) << TC_RB_RB_Pos)))

Definition at line 203 of file component_tc.h.

TC_RB_RB_Msk

#define TC_RB_RB_Msk   (0xffffffffu << TC_RB_RB_Pos)

(TC_RB) Register B

Definition at line 202 of file component_tc.h.

TC_RB_RB_Pos

#define TC_RB_RB_Pos   0

Definition at line 201 of file component_tc.h.

TC_RC_RC

#define TC_RC_RC

(

value

)

Value:

((TC_RC_RC_Msk & ((value) << TC_RC_RC_Pos)))

Definition at line 207 of file component_tc.h.

TC_RC_RC_Msk

#define TC_RC_RC_Msk   (0xffffffffu << TC_RC_RC_Pos)

(TC_RC) Register C

Definition at line 206 of file component_tc.h.

TC_RC_RC_Pos

#define TC_RC_RC_Pos   0

Definition at line 205 of file component_tc.h.

TC_SMMR_DOWN

#define TC_SMMR_DOWN   (0x1u << 1)

(TC_SMMR) DOWN Count

Definition at line 192 of file component_tc.h.

TC_SMMR_GCEN

#define TC_SMMR_GCEN   (0x1u << 0)

(TC_SMMR) Gray Count Enable

Definition at line 191 of file component_tc.h.

TC_SR_CLKSTA

#define TC_SR_CLKSTA   (0x1u << 16)

(TC_SR) Clock Enabling Status

Definition at line 217 of file component_tc.h.

TC_SR_COVFS

#define TC_SR_COVFS   (0x1u << 0)

(TC_SR) Counter Overflow Status

Definition at line 209 of file component_tc.h.

TC_SR_CPAS

#define TC_SR_CPAS   (0x1u << 2)

(TC_SR) RA Compare Status

Definition at line 211 of file component_tc.h.

TC_SR_CPBS

#define TC_SR_CPBS   (0x1u << 3)

(TC_SR) RB Compare Status

Definition at line 212 of file component_tc.h.

TC_SR_CPCS

#define TC_SR_CPCS   (0x1u << 4)

(TC_SR) RC Compare Status

Definition at line 213 of file component_tc.h.

TC_SR_ETRGS

#define TC_SR_ETRGS   (0x1u << 7)

(TC_SR) External Trigger Status

Definition at line 216 of file component_tc.h.

TC_SR_LDRAS

#define TC_SR_LDRAS   (0x1u << 5)

(TC_SR) RA Loading Status

Definition at line 214 of file component_tc.h.

TC_SR_LDRBS

#define TC_SR_LDRBS   (0x1u << 6)

(TC_SR) RB Loading Status

Definition at line 215 of file component_tc.h.

TC_SR_LOVRS

#define TC_SR_LOVRS   (0x1u << 1)

(TC_SR) Load Overrun Status

Definition at line 210 of file component_tc.h.

TC_SR_MTIOA

#define TC_SR_MTIOA   (0x1u << 17)

(TC_SR) TIOA Mirror

Definition at line 218 of file component_tc.h.

TC_SR_MTIOB

#define TC_SR_MTIOB   (0x1u << 18)

(TC_SR) TIOB Mirror

Definition at line 219 of file component_tc.h.

TC_WPMR_WPEN

#define TC_WPMR_WPEN   (0x1u << 0)

(TC_WPMR) Write Protect Enable

Definition at line 300 of file component_tc.h.

Referenced by tc_set_writeprotect().

TC_WPMR_WPKEY_Msk

#define TC_WPMR_WPKEY_Msk   (0xffffffu << TC_WPMR_WPKEY_Pos)

(TC_WPMR) Write Protect KEY

Definition at line 302 of file component_tc.h.

TC_WPMR_WPKEY_PASSWD

#define TC_WPMR_WPKEY_PASSWD   (0x54494Du << 8)

(TC_WPMR) Writing any other value in this field aborts the write operation of the WPEN bit.Always reads as 0.

Definition at line 303 of file component_tc.h.

TC_WPMR_WPKEY_Pos

#define TC_WPMR_WPKEY_Pos   8

Definition at line 301 of file component_tc.h.

TCCHANNEL_NUMBER

#define TCCHANNEL_NUMBER   3

Tc hardware registers.

Definition at line 62 of file component_tc.h.