Two-Wire Interface (TWI)

Driver for the TWI (Two-Wire Interface). More...

Macros
#define	I2C_FAST_MODE_SPEED   400000
#define	LOW_LEVEL_TIME_LIMIT   384000
#define	TWI_CLK_CALC_ARGU   4
#define	TWI_CLK_DIV_MAX   0xFF
#define	TWI_CLK_DIV_MIN   7
#define	TWI_CLK_DIVIDER   2
#define	TWI_WP_KEY_VALUE   TWI_WPMR_WPKEY_PASSWD

Functions
void	twi_disable_interrupt (Twi *p_twi, uint32_t ul_sources)
	Disable TWI interrupts.
void	twi_disable_master_mode (Twi *p_twi)
	Disable TWI master mode.
void	twi_disable_slave_mode (Twi *p_twi)
	Disable TWI slave mode.
void	twi_enable_interrupt (Twi *p_twi, uint32_t ul_sources)
	Enable TWI interrupts.
void	twi_enable_master_mode (Twi *p_twi)
	Enable TWI master mode.
void	twi_enable_slave_mode (Twi *p_twi)
	Enable TWI slave mode.
uint32_t	twi_get_interrupt_mask (Twi *p_twi)
	Read TWI interrupt mask.
uint32_t	twi_get_interrupt_status (Twi *p_twi)
	Get TWI interrupt status.
Pdc *	twi_get_pdc_base (Twi *p_twi)
	Get TWI PDC base address.
uint32_t	twi_master_init (Twi *p_twi, const twi_options_t *p_opt)
	Initialize TWI master mode.
uint32_t	twi_master_read (Twi *p_twi, twi_packet_t *p_packet)
	Read multiple bytes from a TWI compatible slave device.
uint32_t	twi_master_write (Twi *p_twi, twi_packet_t *p_packet)
	Write multiple bytes to a TWI compatible slave device.
uint32_t	twi_mk_addr (const uint8_t *addr, int len)
	Construct the TWI module address register field.
uint32_t	twi_probe (Twi *p_twi, uint8_t uc_slave_addr)
	Test if a chip answers a given I2C address.
uint8_t	twi_read_byte (Twi *p_twi)
	Reads a byte from the TWI bus.
void	twi_reset (Twi *p_twi)
	Reset TWI.
void	twi_set_slave_addr (Twi *p_twi, uint32_t ul_device_addr)
	Set TWI slave address.
uint32_t	twi_set_speed (Twi *p_twi, uint32_t ul_speed, uint32_t ul_mck)
	Set the I2C bus speed in conjunction with the clock frequency.
void	twi_slave_init (Twi *p_twi, uint32_t ul_device_addr)
	Initialize TWI slave mode.
uint32_t	twi_slave_read (Twi *p_twi, uint8_t *p_data)
	Read data from master.
uint32_t	twi_slave_write (Twi *p_twi, uint8_t *p_data)
	Write data to TWI bus.
void	twi_write_byte (Twi *p_twi, uint8_t uc_byte)
	Sends a byte of data to one of the TWI slaves on the bus.

Detailed Description

Driver for the TWI (Two-Wire Interface).

This driver provides access to the main features of the TWI controller. The TWI interconnects components on a unique two-wire bus. The TWI is programmable as a master or a slave with sequential or single-byte access. Multiple master capability is supported.

Usage

1. Enable the TWI peripheral clock in the PMC.
2. Enable the required TWI PIOs (see pio.h).
3. Enable TWI master mode by calling twi_enable_master_mode if it is a master on the I2C bus.
4. Configure the TWI in master mode by calling twi_master_init.
5. Send data to a slave device on the I2C bus by calling twi_master_write.
6. Receive data from a slave device on the I2C bus by calling the twi_master_read.
7. Enable TWI slave mode by calling twi_enable_slave_mode if it is a slave on the I2C bus.
8. Configure the TWI in slave mode by calling twi_slave_init.

Macro Definition Documentation

I2C_FAST_MODE_SPEED

#define I2C_FAST_MODE_SPEED   400000

Definition at line 72 of file twi.c.

Referenced by twi_set_speed().

LOW_LEVEL_TIME_LIMIT

#define LOW_LEVEL_TIME_LIMIT   384000

Definition at line 71 of file twi.c.

Referenced by twi_set_speed().

TWI_CLK_CALC_ARGU

#define TWI_CLK_CALC_ARGU   4

Definition at line 77 of file twi.c.

Referenced by twi_set_speed().

TWI_CLK_DIV_MAX

#define TWI_CLK_DIV_MAX   0xFF

Definition at line 79 of file twi.c.

Referenced by twi_set_speed().

TWI_CLK_DIV_MIN

#define TWI_CLK_DIV_MIN   7

Definition at line 80 of file twi.c.

Referenced by twi_set_speed().

TWI_CLK_DIVIDER

#define TWI_CLK_DIVIDER   2

Definition at line 73 of file twi.c.

Referenced by twi_set_speed().

TWI_WP_KEY_VALUE

#define TWI_WP_KEY_VALUE   TWI_WPMR_WPKEY_PASSWD

Definition at line 82 of file twi.c.

Function Documentation

twi_disable_interrupt()

void twi_disable_interrupt	(	Twi *	p_twi,
		uint32_t	ul_sources )

Disable TWI interrupts.

Parameters

p_twi	Pointer to a TWI instance.
ul_sources	Interrupts to be disabled.

Definition at line 426 of file twi.c.

{
    /* Disable the specified interrupts */
    p_twi->TWI_IDR = ul_sources;
    /* Dummy read */
    p_twi->TWI_SR;
}

References Twi::TWI_IDR, and Twi::TWI_SR.

twi_disable_master_mode()

void twi_disable_master_mode

(

Twi *

p_twi

)

Disable TWI master mode.

Parameters

p_twi

Pointer to a TWI instance.

Definition at line 104 of file twi.c.

{
    /* Set Master Disable bit */
    p_twi->TWI_CR = TWI_CR_MSDIS;
}

References Twi::TWI_CR, and TWI_CR_MSDIS.

twi_disable_slave_mode()

void twi_disable_slave_mode

(

Twi *

p_twi

)

Disable TWI slave mode.

Parameters

p_twi

Pointer to a TWI instance.

Definition at line 501 of file twi.c.

{
    /* Set Slave Disable bit */
    p_twi->TWI_CR = TWI_CR_SVDIS;
}

References Twi::TWI_CR, and TWI_CR_SVDIS.

twi_enable_interrupt()

void twi_enable_interrupt	(	Twi *	p_twi,
		uint32_t	ul_sources )

Enable TWI interrupts.

Parameters

p_twi	Pointer to a TWI instance.
ul_sources	Interrupts to be enabled.

Definition at line 414 of file twi.c.

{
    /* Enable the specified interrupts */
    p_twi->TWI_IER = ul_sources;
}

References Twi::TWI_IER.

twi_enable_master_mode()

void twi_enable_master_mode

(

Twi *

p_twi

)

Enable TWI master mode.

Parameters

p_twi

Pointer to a TWI instance.

Definition at line 89 of file twi.c.

{
    /* Set Master Disable bit and Slave Disable bit */
    p_twi->TWI_CR = TWI_CR_MSDIS;
    p_twi->TWI_CR = TWI_CR_SVDIS;
 
    /* Set Master Enable bit */
    p_twi->TWI_CR = TWI_CR_MSEN;
}

References Twi::TWI_CR, TWI_CR_MSDIS, TWI_CR_MSEN, and TWI_CR_SVDIS.

Referenced by twi_master_init().

twi_enable_slave_mode()

void twi_enable_slave_mode

(

Twi *

p_twi

)

Enable TWI slave mode.

Parameters

p_twi

Pointer to a TWI instance.

Definition at line 486 of file twi.c.

{
    /* Set Master Disable bit and Slave Disable bit */
    p_twi->TWI_CR = TWI_CR_MSDIS;
    p_twi->TWI_CR = TWI_CR_SVDIS;
 
    /* Set Slave Enable bit */
    p_twi->TWI_CR = TWI_CR_SVEN;
}

References Twi::TWI_CR, TWI_CR_MSDIS, TWI_CR_SVDIS, and TWI_CR_SVEN.

Referenced by twi_slave_init().

twi_get_interrupt_mask()

uint32_t twi_get_interrupt_mask

(

Twi *

p_twi

)

Read TWI interrupt mask.

Parameters

p_twi

Pointer to a TWI instance.

Returns

The interrupt mask value.

Definition at line 453 of file twi.c.

{
    return p_twi->TWI_IMR;
}

References Twi::TWI_IMR.

twi_get_interrupt_status()

uint32_t twi_get_interrupt_status

(

Twi *

p_twi

)

Get TWI interrupt status.

Parameters

p_twi

Pointer to a TWI instance.

Return values

TWI	interrupt status.

Definition at line 441 of file twi.c.

{
    return p_twi->TWI_SR;
}

References Twi::TWI_SR.

twi_get_pdc_base()

Pdc * twi_get_pdc_base

(

Twi *

p_twi

)

Get TWI PDC base address.

Parameters

p_twi

Pointer to a TWI instance.

Returns

TWI PDC registers base for PDC driver to access.

Definition at line 623 of file twi.c.

{
    Pdc *p_pdc_base = NULL;
#if !SAMG
    if (p_twi == TWI0) {
        p_pdc_base = PDC_TWI0;
    } else
#endif
#ifdef PDC_TWI1
     if (p_twi == TWI1) {
        p_pdc_base = PDC_TWI1;
    } else
#endif
#ifdef PDC_TWI2
    if (p_twi == TWI2) {
        p_pdc_base = PDC_TWI2;
    } else
#endif
    {
        Assert(false);
    }
 
    return p_pdc_base;
}

References PDC_TWI0, PDC_TWI1, TWI0, and TWI1.

twi_master_init()

uint32_t twi_master_init	(	Twi *	p_twi,
		const twi_options_t *	p_opt )

Initialize TWI master mode.

Parameters

p_twi	Pointer to a TWI instance.
p_opt	Options for initializing the TWI module (see twi_options_t).

Returns

TWI_SUCCESS if initialization is complete, error code otherwise.

Definition at line 118 of file twi.c.

{
    uint32_t status = TWI_SUCCESS;
 
    /* Disable TWI interrupts */
    p_twi->TWI_IDR = ~0UL;
 
    /* Dummy read in status register */
    p_twi->TWI_SR;
 
    /* Reset TWI peripheral */
    twi_reset(p_twi);
 
    twi_enable_master_mode(p_twi);
 
    /* Select the speed */
    if (twi_set_speed(p_twi, p_opt->speed, p_opt->master_clk) == FAIL) {
        /* The desired speed setting is rejected */
        status = TWI_INVALID_ARGUMENT;
    }
 
    if (p_opt->smbus == 1) {
        p_twi->TWI_CR = TWI_CR_QUICK;
    }
 
    return status;
}

References twi_options::master_clk, twi_options::smbus, twi_options::speed, Twi::TWI_CR, TWI_CR_QUICK, twi_enable_master_mode(), Twi::TWI_IDR, TWI_INVALID_ARGUMENT, twi_reset(), twi_set_speed(), Twi::TWI_SR, and TWI_SUCCESS.

Referenced by twi_master_setup().

twi_master_read()

uint32_t twi_master_read	(	Twi *	p_twi,
		twi_packet_t *	p_packet )

Read multiple bytes from a TWI compatible slave device.

Note

This function will NOT return until all data has been read or error occurs.

Parameters

p_twi	Pointer to a TWI instance.
p_packet	Packet information and data (see twi_packet_t).

Returns

TWI_SUCCESS if all bytes were read, error code otherwise.

Definition at line 278 of file twi.c.

{
    uint32_t status;
    uint32_t cnt = p_packet->length;
    uint8_t *buffer = p_packet->buffer;
    uint8_t stop_sent = 0;
    uint32_t timeout = TWI_TIMEOUT;;
    
    /* Check argument */
    if (cnt == 0) {
        return TWI_INVALID_ARGUMENT;
    }
 
    /* Set read mode, slave address and 3 internal address byte lengths */
    p_twi->TWI_MMR = 0;
    p_twi->TWI_MMR = TWI_MMR_MREAD | TWI_MMR_DADR(p_packet->chip) |
            ((p_packet->addr_length << TWI_MMR_IADRSZ_Pos) &
            TWI_MMR_IADRSZ_Msk);
 
    /* Set internal address for remote chip */
    p_twi->TWI_IADR = 0;
    p_twi->TWI_IADR = twi_mk_addr(p_packet->addr, p_packet->addr_length);
 
    /* Send a START condition */
    if (cnt == 1) {
        p_twi->TWI_CR = TWI_CR_START | TWI_CR_STOP;
        stop_sent = 1;
    } else {
        p_twi->TWI_CR = TWI_CR_START;
        stop_sent = 0;
    }
 
    while (cnt > 0) {
        status = p_twi->TWI_SR;
        if (status & TWI_SR_NACK) {
            return TWI_RECEIVE_NACK;
        }
 
        if (!timeout--) {
            return TWI_ERROR_TIMEOUT;
        }
                
        /* Last byte ? */
        if (cnt == 1  && !stop_sent) {
            p_twi->TWI_CR = TWI_CR_STOP;
            stop_sent = 1;
        }
 
        if (!(status & TWI_SR_RXRDY)) {
            continue;
        }
        *buffer++ = p_twi->TWI_RHR;
 
        cnt--;
        timeout = TWI_TIMEOUT;
    }
 
    while (!(p_twi->TWI_SR & TWI_SR_TXCOMP)) {
    }
 
    p_twi->TWI_SR;
 
    return TWI_SUCCESS;
}

References twi_packet::addr, twi_packet::addr_length, twi_packet::buffer, twi_packet::chip, twi_packet::length, Twi::TWI_CR, TWI_CR_START, TWI_CR_STOP, TWI_ERROR_TIMEOUT, Twi::TWI_IADR, TWI_INVALID_ARGUMENT, twi_mk_addr(), Twi::TWI_MMR, TWI_MMR_DADR, TWI_MMR_IADRSZ_Msk, TWI_MMR_IADRSZ_Pos, TWI_MMR_MREAD, TWI_RECEIVE_NACK, Twi::TWI_RHR, Twi::TWI_SR, TWI_SR_NACK, TWI_SR_RXRDY, TWI_SR_TXCOMP, TWI_SUCCESS, and TWI_TIMEOUT.

twi_master_write()

uint32_t twi_master_write	(	Twi *	p_twi,
		twi_packet_t *	p_packet )

Write multiple bytes to a TWI compatible slave device.

Note

This function will NOT return until all data has been written or error occurred.

Parameters

p_twi	Pointer to a TWI instance.
p_packet	Packet information and data (see twi_packet_t).

Returns

TWI_SUCCESS if all bytes were written, error code otherwise.

Definition at line 353 of file twi.c.

{
    uint32_t status;
    uint32_t cnt = p_packet->length;
    uint8_t *buffer = p_packet->buffer;
 
    /* Check argument */
    if (cnt == 0) {
        return TWI_INVALID_ARGUMENT;
    }
 
    /* Set write mode, slave address and 3 internal address byte lengths */
    p_twi->TWI_MMR = 0;
    p_twi->TWI_MMR = TWI_MMR_DADR(p_packet->chip) |
            ((p_packet->addr_length << TWI_MMR_IADRSZ_Pos) &
            TWI_MMR_IADRSZ_Msk);
 
    /* Set internal address for remote chip */
    p_twi->TWI_IADR = 0;
    p_twi->TWI_IADR = twi_mk_addr(p_packet->addr, p_packet->addr_length);
 
    /* Send all bytes */
    while (cnt > 0) {
        status = p_twi->TWI_SR;
        if (status & TWI_SR_NACK) {
            return TWI_RECEIVE_NACK;
        }
 
        if (!(status & TWI_SR_TXRDY)) {
            continue;
        }
        p_twi->TWI_THR = *buffer++;
 
        cnt--;
    }
 
    while (1) {
        status = p_twi->TWI_SR;
        if (status & TWI_SR_NACK) {
            return TWI_RECEIVE_NACK;
        }
 
        if (status & TWI_SR_TXRDY) {
            break;
        }
    }
 
    p_twi->TWI_CR = TWI_CR_STOP;
 
    while (!(p_twi->TWI_SR & TWI_SR_TXCOMP)) {
    }
 
    return TWI_SUCCESS;
}

References twi_packet::addr, twi_packet::addr_length, twi_packet::buffer, twi_packet::chip, twi_packet::length, Twi::TWI_CR, TWI_CR_STOP, Twi::TWI_IADR, TWI_INVALID_ARGUMENT, twi_mk_addr(), Twi::TWI_MMR, TWI_MMR_DADR, TWI_MMR_IADRSZ_Msk, TWI_MMR_IADRSZ_Pos, TWI_RECEIVE_NACK, Twi::TWI_SR, TWI_SR_NACK, TWI_SR_TXCOMP, TWI_SR_TXRDY, TWI_SUCCESS, and Twi::TWI_THR.

Referenced by twi_probe().

twi_mk_addr()

uint32_t twi_mk_addr	(	const uint8_t *	addr,
		int	len )

Construct the TWI module address register field.

The TWI module address register is sent out MSB first. And the size controls which byte is the MSB to start with.

Please see the device datasheet for details on this.

Definition at line 249 of file twi.c.

{
    uint32_t val;
 
    if (len == 0)
        return 0;
 
    val = addr[0];
    if (len > 1) {
        val <<= 8;
        val |= addr[1];
    }
    if (len > 2) {
        val <<= 8;
        val |= addr[2];
    }
    return val;
}

Referenced by twi_master_read(), and twi_master_write().

twi_probe()

uint32_t twi_probe	(	Twi *	p_twi,
		uint8_t	uc_slave_addr )

Test if a chip answers a given I2C address.

Parameters

p_twi	Pointer to a TWI instance.
uc_slave_addr	Address of the remote chip to search for.

Returns

TWI_SUCCESS if a chip was found, error code otherwise.

Definition at line 219 of file twi.c.

{
    twi_packet_t packet;
    uint8_t data = 0;
 
    /* Data to send */
    packet.buffer = &data;
    /* Data length */
    packet.length = 1;
    /* Slave chip address */
    packet.chip = (uint32_t) uc_slave_addr;
    /* Internal chip address */
    packet.addr[0] = 0;
    /* Address length */
    packet.addr_length = 0;
 
    /* Perform a master write access */
    return (twi_master_write(p_twi, &packet));
}

References twi_packet::addr, twi_packet::addr_length, twi_packet::buffer, twi_packet::chip, twi_packet::length, and twi_master_write().

twi_read_byte()

uint8_t twi_read_byte

(

Twi *

p_twi

)

Reads a byte from the TWI bus.

Parameters

p_twi

Pointer to a TWI instance.

Returns

The byte read.

Definition at line 465 of file twi.c.

{
    return p_twi->TWI_RHR;
}

References Twi::TWI_RHR.

twi_reset()

void twi_reset

(

Twi *

p_twi

)

Reset TWI.

Parameters

p_twi

Pointer to a TWI instance.

Definition at line 609 of file twi.c.

{
    /* Set SWRST bit to reset TWI peripheral */
    p_twi->TWI_CR = TWI_CR_SWRST;
    p_twi->TWI_RHR;
}

References Twi::TWI_CR, TWI_CR_SWRST, and Twi::TWI_RHR.

Referenced by twi_master_init(), and twi_slave_init().

twi_set_slave_addr()

void twi_set_slave_addr	(	Twi *	p_twi,
		uint32_t	ul_device_addr )

Set TWI slave address.

Parameters

p_twi	Pointer to a TWI instance.
ul_device_addr	Device address of the SAM slave device on the I2C bus.

Definition at line 535 of file twi.c.

{
    /* Set slave address */
    p_twi->TWI_SMR = TWI_SMR_SADR(ul_device_addr);
}

References Twi::TWI_SMR, and TWI_SMR_SADR.

twi_set_speed()

uint32_t twi_set_speed	(	Twi *	p_twi,
		uint32_t	ul_speed,
		uint32_t	ul_mck )

Set the I2C bus speed in conjunction with the clock frequency.

Parameters

p_twi	Pointer to a TWI instance.
ul_speed	The desired I2C bus speed (in Hz).
ul_mck	Main clock of the device (in Hz).

Return values

PASS	New speed setting is accepted.
FAIL	New speed setting is rejected.

Definition at line 156 of file twi.c.

{
    uint32_t ckdiv = 0;
    uint32_t c_lh_div;
    uint32_t cldiv, chdiv;
 
    if (ul_speed > I2C_FAST_MODE_SPEED) {
        return FAIL;
    }
 
    /* Low level time not less than 1.3us of I2C Fast Mode. */
    if (ul_speed > LOW_LEVEL_TIME_LIMIT) {
        /* Low level of time fixed for 1.3us. */
        cldiv = ul_mck / (LOW_LEVEL_TIME_LIMIT * TWI_CLK_DIVIDER) - TWI_CLK_CALC_ARGU;
        chdiv = ul_mck / ((ul_speed + (ul_speed - LOW_LEVEL_TIME_LIMIT)) * TWI_CLK_DIVIDER) - TWI_CLK_CALC_ARGU;
        
        /* cldiv must fit in 8 bits, ckdiv must fit in 3 bits */
        while ((cldiv > TWI_CLK_DIV_MAX) && (ckdiv < TWI_CLK_DIV_MIN)) {
            /* Increase clock divider */
            ckdiv++;
            /* Divide cldiv value */
            cldiv /= TWI_CLK_DIVIDER;
        }
        /* chdiv must fit in 8 bits, ckdiv must fit in 3 bits */
        while ((chdiv > TWI_CLK_DIV_MAX) && (ckdiv < TWI_CLK_DIV_MIN)) {
            /* Increase clock divider */
            ckdiv++;
            /* Divide cldiv value */
            chdiv /= TWI_CLK_DIVIDER;
        }
 
        /* set clock waveform generator register */
        p_twi->TWI_CWGR =
                TWI_CWGR_CLDIV(cldiv) | TWI_CWGR_CHDIV(chdiv) |
                TWI_CWGR_CKDIV(ckdiv);      
    } else {
        c_lh_div = ul_mck / (ul_speed * TWI_CLK_DIVIDER) - TWI_CLK_CALC_ARGU;
 
        /* cldiv must fit in 8 bits, ckdiv must fit in 3 bits */
        while ((c_lh_div > TWI_CLK_DIV_MAX) && (ckdiv < TWI_CLK_DIV_MIN)) {
            /* Increase clock divider */
            ckdiv++;
            /* Divide cldiv value */
            c_lh_div /= TWI_CLK_DIVIDER;
        }
 
        /* set clock waveform generator register */
        p_twi->TWI_CWGR =
                TWI_CWGR_CLDIV(c_lh_div) | TWI_CWGR_CHDIV(c_lh_div) |
                TWI_CWGR_CKDIV(ckdiv);
    }
 
    return PASS;
}

References I2C_FAST_MODE_SPEED, LOW_LEVEL_TIME_LIMIT, TWI_CLK_CALC_ARGU, TWI_CLK_DIV_MAX, TWI_CLK_DIV_MIN, TWI_CLK_DIVIDER, Twi::TWI_CWGR, TWI_CWGR_CHDIV, TWI_CWGR_CKDIV, and TWI_CWGR_CLDIV.

Referenced by twi_master_init().

twi_slave_init()

void twi_slave_init	(	Twi *	p_twi,
		uint32_t	ul_device_addr )

Initialize TWI slave mode.

Parameters

p_twi	Pointer to a TWI instance.
ul_device_addr	Device address of the SAM slave device on the I2C bus.

Definition at line 513 of file twi.c.

{
    /* Disable TWI interrupts */
    p_twi->TWI_IDR = ~0UL;
    p_twi->TWI_SR;
 
    /* Reset TWI */
    twi_reset(p_twi);
 
    /* Set slave address in slave mode */
    p_twi->TWI_SMR = TWI_SMR_SADR(ul_device_addr);
 
    /* Enable slave mode */
    twi_enable_slave_mode(p_twi);
}

References twi_enable_slave_mode(), Twi::TWI_IDR, twi_reset(), Twi::TWI_SMR, TWI_SMR_SADR, and Twi::TWI_SR.

Referenced by twi_slave_setup().

twi_slave_read()

uint32_t twi_slave_read	(	Twi *	p_twi,
		uint8_t *	p_data )

Read data from master.

Note

This function will NOT return until master sends a STOP condition.

Parameters

p_twi	Pointer to a TWI instance.
p_data	Pointer to the data buffer where data received will be stored.

Returns

Number of bytes read.

Definition at line 551 of file twi.c.

{
    uint32_t status, cnt = 0;
 
    do {
        status = p_twi->TWI_SR;
        if (status & TWI_SR_SVACC) {
            if (!(status & TWI_SR_GACC) &&
                ((status & (TWI_SR_SVREAD | TWI_SR_RXRDY))
                 == (TWI_SR_SVREAD | TWI_SR_RXRDY))) {
                *p_data++ = (uint8_t) p_twi->TWI_RHR;
                cnt++;
            }
        } else if ((status & (TWI_SR_EOSACC | TWI_SR_TXCOMP))
                    == (TWI_SR_EOSACC | TWI_SR_TXCOMP)) {
            break;
        }
    } while (1);
 
    return cnt;
}

References Twi::TWI_RHR, Twi::TWI_SR, TWI_SR_EOSACC, TWI_SR_GACC, TWI_SR_RXRDY, TWI_SR_SVACC, TWI_SR_SVREAD, and TWI_SR_TXCOMP.

twi_slave_write()

uint32_t twi_slave_write	(	Twi *	p_twi,
		uint8_t *	p_data )

Write data to TWI bus.

Note

This function will NOT return until master sends a STOP condition.

Parameters

p_twi	Pointer to a TWI instance.
p_data	Pointer to the data buffer to be sent.

Returns

Number of bytes written.

Definition at line 583 of file twi.c.

{
    uint32_t status, cnt = 0;
 
    do {
        status = p_twi->TWI_SR;
        if (status & TWI_SR_SVACC) {
            if (!(status & (TWI_SR_GACC | TWI_SR_SVREAD)) &&
                (status & TWI_SR_TXRDY)) {
                p_twi->TWI_THR = *p_data++;
                cnt++;
            }
        } else if ((status & (TWI_SR_EOSACC | TWI_SR_TXCOMP))
                    == (TWI_SR_EOSACC | TWI_SR_TXCOMP)) {
            break;
        }
    } while (1);
 
    return cnt;
}

References Twi::TWI_SR, TWI_SR_EOSACC, TWI_SR_GACC, TWI_SR_SVACC, TWI_SR_SVREAD, TWI_SR_TXCOMP, TWI_SR_TXRDY, and Twi::TWI_THR.

twi_write_byte()

void twi_write_byte	(	Twi *	p_twi,
		uint8_t	uc_byte )

Sends a byte of data to one of the TWI slaves on the bus.

Parameters

p_twi	Pointer to a TWI instance.
uc_byte	The byte to send.

Definition at line 476 of file twi.c.

{
    p_twi->TWI_THR = uc_byte;
}

References Twi::TWI_THR.